diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/tbm_patterns.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/test-shrink-bug.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/test-shrink.ll | 44 |
4 files changed, 46 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 84b1f9624ad..eb0107a5fa4 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -3025,7 +3025,10 @@ void X86DAGToDAGISel::Select(SDNode *Node) { } // For example, "testl %eax, $32776" to "testw %ax, $32776". - if (isUInt<16>(Mask) && N0.getValueType() != MVT::i16 && + // NOTE: We only want to form TESTW instructions if optimizing for + // min size. Otherwise we only save one byte and possibly get a length + // changing prefix penalty in the decoders. + if (OptForMinSize && isUInt<16>(Mask) && N0.getValueType() != MVT::i16 && (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) { SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i16); SDValue Reg = N0.getOperand(0); diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll index a72b5405615..e459e173eda 100644 --- a/llvm/test/CodeGen/X86/tbm_patterns.ll +++ b/llvm/test/CodeGen/X86/tbm_patterns.ll @@ -53,7 +53,7 @@ define i32 @test_x86_tbm_bextri_u32_z2(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u32_z2: ; CHECK: # BB#0: ; CHECK-NEXT: shrl $4, %edi -; CHECK-NEXT: testw $4095, %di # imm = 0xFFF +; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF ; CHECK-NEXT: cmovnel %edx, %esi ; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: retq @@ -114,7 +114,7 @@ define i64 @test_x86_tbm_bextri_u64_z2(i64 %a, i64 %b, i64 %c) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u64_z2: ; CHECK: # BB#0: ; CHECK-NEXT: shrl $4, %edi -; CHECK-NEXT: testw $4095, %di # imm = 0xFFF +; CHECK-NEXT: testl $4095, %edi # imm = 0xFFF ; CHECK-NEXT: cmovneq %rdx, %rsi ; CHECK-NEXT: movq %rsi, %rax ; CHECK-NEXT: retq diff --git a/llvm/test/CodeGen/X86/test-shrink-bug.ll b/llvm/test/CodeGen/X86/test-shrink-bug.ll index 1bb1e638483..814e07f718b 100644 --- a/llvm/test/CodeGen/X86/test-shrink-bug.ll +++ b/llvm/test/CodeGen/X86/test-shrink-bug.ll @@ -3,7 +3,7 @@ ; Codegen shouldn't reduce the comparison down to testb $-1, %al ; because that changes the result of the signed test. ; PR5132 -; CHECK: testw $255, %ax +; CHECK: testl $255, %eax target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin10.0" diff --git a/llvm/test/CodeGen/X86/test-shrink.ll b/llvm/test/CodeGen/X86/test-shrink.ll index 72f2d1fb86f..e09ec43210e 100644 --- a/llvm/test/CodeGen/X86/test-shrink.ll +++ b/llvm/test/CodeGen/X86/test-shrink.ll @@ -105,10 +105,10 @@ no: ret void } ; CHECK-64-LABEL: g64x16: -; CHECK-64: testw $-32640, %[[A0W:di|cx]] +; CHECK-64: testl $32896, %[[A0D:edi|ecx]] ; CHECK-64: ret ; CHECK-32-LABEL: g64x16: -; CHECK-32: testw $-32640, %ax +; CHECK-32: testl $32896, %eax ; CHECK-32: ret define void @g64x16(i64 inreg %x) nounwind { %t = and i64 %x, 32896 @@ -121,11 +121,28 @@ yes: no: ret void } +; CHECK-64-LABEL: g64x16minsize: +; CHECK-64: testw $-32640, %[[A0W:di|cx]] +; CHECK-64: ret +; CHECK-32-LABEL: g64x16minsize: +; CHECK-32: testw $-32640, %ax +; CHECK-32: ret +define void @g64x16minsize(i64 inreg %x) nounwind minsize { + %t = and i64 %x, 32896 + %s = icmp eq i64 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} ; CHECK-64-LABEL: g32x16: -; CHECK-64: testw $-32640, %[[A0W]] +; CHECK-64: testl $32896, %[[A0D]] ; CHECK-64: ret ; CHECK-32-LABEL: g32x16: -; CHECK-32: testw $-32640, %ax +; CHECK-32: testl $32896, %eax ; CHECK-32: ret define void @g32x16(i32 inreg %x) nounwind { %t = and i32 %x, 32896 @@ -138,8 +155,25 @@ yes: no: ret void } +; CHECK-64-LABEL: g32x16minsize: +; CHECK-64: testw $-32640, %[[A0W]] +; CHECK-64: ret +; CHECK-32-LABEL: g32x16minsize: +; CHECK-32: testw $-32640, %ax +; CHECK-32: ret +define void @g32x16minsize(i32 inreg %x) nounwind minsize { + %t = and i32 %x, 32896 + %s = icmp eq i32 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} ; CHECK-64-LABEL: g64x32: -; CHECK-64: testl $268468352, %e[[A0W]] +; CHECK-64: testl $268468352, %[[A0D]] ; CHECK-64: ret ; CHECK-32-LABEL: g64x32: ; CHECK-32: testl $268468352, %eax |
