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authorRenato Golin <renato.golin@linaro.org>2016-03-03 08:57:44 +0000
committerRenato Golin <renato.golin@linaro.org>2016-03-03 08:57:44 +0000
commit3d78271eacf88f9ceed2bab446942077c868aeb5 (patch)
treeb4da5a0d3986d43a75f0057a9d630e3631216463 /llvm/lib/Target
parentabbe34bce65b74ad23b4304eb180691d8685f6a0 (diff)
downloadbcm5719-llvm-3d78271eacf88f9ceed2bab446942077c868aeb5.tar.gz
bcm5719-llvm-3d78271eacf88f9ceed2bab446942077c868aeb5.zip
Revert "[ARM] Merging 64-bit divmod lib calls into one"
This reverts commit r262507, which broke some ARM buildbots. llvm-svn: 262594
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp9
1 files changed, 0 insertions, 9 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index a0bf9179427..479b6d29be9 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -809,8 +809,6 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::SDIVREM, MVT::i32, Custom);
setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
- setOperationAction(ISD::SDIVREM, MVT::i64, Custom);
- setOperationAction(ISD::UDIVREM, MVT::i64, Custom);
} else {
setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
@@ -7056,13 +7054,6 @@ void ARMTargetLowering::ReplaceNodeResults(SDNode *N,
case ISD::UREM:
Res = LowerREM(N, DAG);
break;
- case ISD::SDIVREM:
- case ISD::UDIVREM:
- Res = LowerDivRem(SDValue(N, 0), DAG);
- assert(Res.getNumOperands() == 2 && "DivRem needs two values");
- Results.push_back(Res.getValue(0));
- Results.push_back(Res.getValue(1));
- return;
case ISD::READCYCLECOUNTER:
ReplaceREADCYCLECOUNTER(N, Results, DAG, Subtarget);
return;
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