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authorYi Kong <yikong@google.com>2017-11-16 23:38:17 +0000
committerYi Kong <yikong@google.com>2017-11-16 23:38:17 +0000
commit39bcd4ed3e5e824f363303077c98f54be61c3add (patch)
treea3ec8b5b237b489aefc541e499a22252143b0d4e /llvm/lib/Target
parent513fc069f00b3540eedab30ca188ab29bbcf4047 (diff)
downloadbcm5719-llvm-39bcd4ed3e5e824f363303077c98f54be61c3add.tar.gz
bcm5719-llvm-39bcd4ed3e5e824f363303077c98f54be61c3add.zip
[ARM] 't' asm constraint should accept i32
't' constraint normally only accepts f32 operands, but for VCVT the operands can be i32. LLVM is overly restrictive and rejects asm like: float foo() { float result; __asm__ __volatile__( "vcvt.f32.s32 %[result], %[arg1]\n" : [result]"=t"(result) : [arg1]"t"(0x01020304) ); return result; } Relax the value type for 't' constraint to either f32 or i32. Differential Revision: https://reviews.llvm.org/D40137 llvm-svn: 318472
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 617675c7ca1..4f200ecfc28 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13024,7 +13024,7 @@ RCPair ARMTargetLowering::getRegForInlineAsmConstraint(
return RCPair(0U, &ARM::QPR_8RegClass);
break;
case 't':
- if (VT == MVT::f32)
+ if (VT == MVT::f32 || VT == MVT::i32)
return RCPair(0U, &ARM::SPRRegClass);
break;
}
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