ARM: don't try to create an i8 -> i32 vpaddl.

DAG combine was mistakenly assuming that the step-up it was looking at was
always a doubling, but it can sometimes be a larger extension in which case
we'd crash.

llvm-svn: 301002

1 files changed, 5 insertions, 2 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 0f8cdad983d..df840d723e3 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -9480,8 +9480,11 @@ AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1,
       return SDValue();
   }
 
-  // Don't generate vpaddl+vmovn; we'll match it to vpadd later.
-  if (Vec.getValueType().getVectorElementType() == VT.getVectorElementType())
+  // Don't generate vpaddl+vmovn; we'll match it to vpadd later. Also don't try
+  // to handle an i8 -> i32 situation (or similar). vpaddl can only double the
+  // size.
+  if (2 * Vec.getValueType().getVectorElementType().getSizeInBits() !=
+      VT.getVectorElementType().getSizeInBits())
     return SDValue();
 
   // Create VPADDL node.