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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 19:16:52 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 19:16:52 +0000 |
| commit | 06cbb27a792f5422b89c1c01fb17f37f4de048d6 (patch) | |
| tree | 2e3fd4c260148c374ab29fac49901dbbcad39d2e /llvm/lib/Target | |
| parent | cc6238158a7dfb301a7a671fb5a70ebb51af2cde (diff) | |
| download | bcm5719-llvm-06cbb27a792f5422b89c1c01fb17f37f4de048d6.tar.gz bcm5719-llvm-06cbb27a792f5422b89c1c01fb17f37f4de048d6.zip | |
AMDGPU/GlobalISel: Define instruction mapping for G_IMPLICIT_DEF
Patch by Tom Stellard
llvm-svn: 326470
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 5 |
2 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 35aa373138f..ae193fec7d8 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -54,6 +54,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() { setAction({G_FCONSTANT, S32}, Legal); setAction({G_FCONSTANT, S64}, Legal); + setAction({G_IMPLICIT_DEF, S32}, Legal); + setAction({G_IMPLICIT_DEF, S64}, Legal); + setAction({G_FADD, S32}, Legal); setAction({G_FCMP, S1}, Legal); diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 4454e5056e3..8d94898415b 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -174,6 +174,11 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { default: IsComplete = false; break; + case AMDGPU::G_IMPLICIT_DEF: { + unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); + OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size); + break; + } case AMDGPU::G_FCONSTANT: case AMDGPU::G_CONSTANT: { unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); |
