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| author | Craig Topper <craig.topper@intel.com> | 2018-01-07 06:48:20 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-07 06:48:20 +0000 |
| commit | a21f5511090ba214cb91d9ff8df82c08faddc968 (patch) | |
| tree | b0b1ce41508407989f8f0707f421c0680a4f40a7 /llvm/lib/Target/X86 | |
| parent | 56331e28648458aa9482dfab4c10e81b30f9e05c (diff) | |
| download | bcm5719-llvm-a21f5511090ba214cb91d9ff8df82c08faddc968.tar.gz bcm5719-llvm-a21f5511090ba214cb91d9ff8df82c08faddc968.zip | |
[X86] Add the 16 and 8-bit CRC32 instructions to the load folding tables.
llvm-svn: 321958
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 92b3f311db9..88b608d3e45 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1217,8 +1217,11 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) { X86::CMPSDrr_Int, X86::CMPSDrm_Int, TB_NO_REVERSE }, { X86::CMPSSrr, X86::CMPSSrm, 0 }, { X86::CMPSSrr_Int, X86::CMPSSrm_Int, TB_NO_REVERSE }, + { X86::CRC32r32r16, X86::CRC32r32m16, 0 }, { X86::CRC32r32r32, X86::CRC32r32m32, 0 }, + { X86::CRC32r32r8, X86::CRC32r32m8, 0 }, { X86::CRC32r64r64, X86::CRC32r64m64, 0 }, + { X86::CRC32r64r8, X86::CRC32r64m8, 0 }, { X86::CVTSD2SSrr_Int, X86::CVTSD2SSrm_Int, TB_NO_REVERSE }, { X86::CVTSS2SDrr_Int, X86::CVTSS2SDrm_Int, TB_NO_REVERSE }, { X86::DIVPDrr, X86::DIVPDrm, TB_ALIGN_16 }, |
