summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86
diff options
context:
space:
mode:
authorJuergen Ributzka <juergen@apple.com>2014-06-25 20:06:12 +0000
committerJuergen Ributzka <juergen@apple.com>2014-06-25 20:06:12 +0000
commit296833cde9c68cb143690d654aa515009ed5634c (patch)
tree339854b1be4fb577b17193c95261d14a1e7fc46e /llvm/lib/Target/X86
parentcfcd7914da9ce15a8b88ab8ee318db3c7d7d1ff3 (diff)
downloadbcm5719-llvm-296833cde9c68cb143690d654aa515009ed5634c.tar.gz
bcm5719-llvm-296833cde9c68cb143690d654aa515009ed5634c.zip
[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.
If the cmp is in a different basic block, then it is possible that not all operands of that compare have defined registers. This can happen when one of the operands to the cmp is a load and the load gets folded into the cmp. In this case FastISel will skip the load instruction and the vreg is never defined. llvm-svn: 211730
Diffstat (limited to 'llvm/lib/Target/X86')
-rw-r--r--llvm/lib/Target/X86/X86FastISel.cpp20
1 files changed, 15 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 6ada3977f06..92b3d62f0cc 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -1754,8 +1754,11 @@ bool X86FastISel::X86FastEmitCMoveSelect(const Instruction *I) {
const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
bool NeedTest = true;
- // Optimize conditons coming from a compare.
- if (const auto *CI = dyn_cast<CmpInst>(Cond)) {
+ // Optimize conditons coming from a compare if both instructions are in the
+ // same basic block (values defined in other basic blocks may not have
+ // initialized registers).
+ const auto *CI = dyn_cast<CmpInst>(Cond);
+ if (CI && (CI->getParent() == I->getParent())) {
CmpInst::Predicate Predicate = optimizeCmpPredicate(CI);
// FCMP_OEQ and FCMP_UNE cannot be checked with a single instruction.
@@ -1927,8 +1930,11 @@ bool X86FastISel::X86FastEmitSSESelect(const Instruction *I) {
if (!isTypeLegal(I->getType(), RetVT))
return false;
+ // Optimize conditons coming from a compare if both instructions are in the
+ // same basic block (values defined in other basic blocks may not have
+ // initialized registers).
const auto *CI = dyn_cast<FCmpInst>(I->getOperand(0));
- if (!CI)
+ if (!CI || (CI->getParent() != I->getParent()))
return false;
if (I->getType() != CI->getOperand(0)->getType() ||
@@ -2023,8 +2029,12 @@ bool X86FastISel::X86FastEmitPseudoSelect(const Instruction *I) {
const Value *Cond = I->getOperand(0);
X86::CondCode CC = X86::COND_NE;
- // Don't emit a test if the condition comes from a compare.
- if (const auto *CI = dyn_cast<CmpInst>(Cond)) {
+
+ // Optimize conditons coming from a compare if both instructions are in the
+ // same basic block (values defined in other basic blocks may not have
+ // initialized registers).
+ const auto *CI = dyn_cast<CmpInst>(Cond);
+ if (CI && (CI->getParent() == I->getParent())) {
bool NeedSwap;
std::tie(CC, NeedSwap) = getX86ConditonCode(CI->getPredicate());
if (CC > X86::LAST_VALID_COND)
OpenPOWER on IntegriCloud