diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 20 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-select-cmp.ll | 50 |
2 files changed, 65 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index 6ada3977f06..92b3d62f0cc 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -1754,8 +1754,11 @@ bool X86FastISel::X86FastEmitCMoveSelect(const Instruction *I) { const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT); bool NeedTest = true; - // Optimize conditons coming from a compare. - if (const auto *CI = dyn_cast<CmpInst>(Cond)) { + // Optimize conditons coming from a compare if both instructions are in the + // same basic block (values defined in other basic blocks may not have + // initialized registers). + const auto *CI = dyn_cast<CmpInst>(Cond); + if (CI && (CI->getParent() == I->getParent())) { CmpInst::Predicate Predicate = optimizeCmpPredicate(CI); // FCMP_OEQ and FCMP_UNE cannot be checked with a single instruction. @@ -1927,8 +1930,11 @@ bool X86FastISel::X86FastEmitSSESelect(const Instruction *I) { if (!isTypeLegal(I->getType(), RetVT)) return false; + // Optimize conditons coming from a compare if both instructions are in the + // same basic block (values defined in other basic blocks may not have + // initialized registers). const auto *CI = dyn_cast<FCmpInst>(I->getOperand(0)); - if (!CI) + if (!CI || (CI->getParent() != I->getParent())) return false; if (I->getType() != CI->getOperand(0)->getType() || @@ -2023,8 +2029,12 @@ bool X86FastISel::X86FastEmitPseudoSelect(const Instruction *I) { const Value *Cond = I->getOperand(0); X86::CondCode CC = X86::COND_NE; - // Don't emit a test if the condition comes from a compare. - if (const auto *CI = dyn_cast<CmpInst>(Cond)) { + + // Optimize conditons coming from a compare if both instructions are in the + // same basic block (values defined in other basic blocks may not have + // initialized registers). + const auto *CI = dyn_cast<CmpInst>(Cond); + if (CI && (CI->getParent() == I->getParent())) { bool NeedSwap; std::tie(CC, NeedSwap) = getX86ConditonCode(CI->getPredicate()); if (CC > X86::LAST_VALID_COND) diff --git a/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll b/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll new file mode 100644 index 00000000000..1af30e9f32f --- /dev/null +++ b/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s + +; Test if we do not fold the cmp into select if the instructions are in +; different basic blocks. + +define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) { +; CHECK-LABEL: select_cmp_cmov_i32 +; CHECK-LABEL: continue +; CHECK-NOT: cmp + %1 = icmp ult i32 %a, %b + br i1 %1, label %continue, label %exit + +continue: + %2 = select i1 %1, i32 %a, i32 %b + ret i32 %2 + +exit: + ret i32 -1 +} + +define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) { +; CHECK-LABEL: select_fcmp_oeq_f32 +; CHECK-LABEL: continue +; CHECK-NOT: cmp + %1 = fcmp oeq float %a, %b + br i1 %1, label %continue, label %exit + +continue: + %2 = select i1 %1, float %c, float %d + ret float %2 + +exit: + ret float -1.0 +} + +define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) { +; CHECK-LABEL: select_fcmp_one_f32 +; CHECK-LABEL: continue +; CHECK-NOT: ucomi + %1 = fcmp one float %a, %b + br i1 %1, label %continue, label %exit + +continue: + %2 = select i1 %1, float %c, float %d + ret float %2 + +exit: + ret float -1.0 +} + |
