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authorCraig Topper <craig.topper@intel.com>2018-04-29 04:50:53 +0000
committerCraig Topper <craig.topper@intel.com>2018-04-29 04:50:53 +0000
commitebd3e4a69cb52af96ec9529a35536b2cd0657298 (patch)
tree422900e87561c029f7c9740687fbba67cfcce9df /llvm/lib/Target/X86/X86InstrSystem.td
parent8e3dbfd725eb8283deaf27cccff0993d09bbb99d (diff)
downloadbcm5719-llvm-ebd3e4a69cb52af96ec9529a35536b2cd0657298.tar.gz
bcm5719-llvm-ebd3e4a69cb52af96ec9529a35536b2cd0657298.zip
[X86] Remove SLDT64m instruction.
It doesn't really exist. The instruction always writes 16-bits of memory. Putting a REX.w on it won't change anything. While I was touching the encoding tests to remove it, I added some other missing register form test cases. llvm-svn: 331135
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrSystem.td')
-rw-r--r--llvm/lib/Target/X86/X86InstrSystem.td3
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index 3e9c264a693..190f2958876 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -382,9 +382,6 @@ def SLDT32r : I<0x00, MRM0r, (outs GR32:$dst), (ins),
// extension.
def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins),
"sldt{q}\t$dst", []>, TB, Requires<[In64BitMode]>;
-let mayStore = 1 in
-def SLDT64m : RI<0x00, MRM0m, (outs), (ins i16mem:$dst),
- "sldt{q}\t$dst", []>, TB, Requires<[In64BitMode]>;
def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
"lgdt{w}\t$src", []>, TB, OpSize16, Requires<[Not64BitMode]>;
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