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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-07-12 00:52:33 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-07-12 00:52:33 +0000 |
| commit | e35d70fafa065307a97aed65f2e985ffb6365865 (patch) | |
| tree | 45cade97a58566c654bb516a703e08c51230e7c9 /llvm/lib/Target/X86/X86InstrInfo.cpp | |
| parent | bbc25ff5ccc551cc3b78bc9a57a64d6ef4472d8a (diff) | |
| download | bcm5719-llvm-e35d70fafa065307a97aed65f2e985ffb6365865.tar.gz bcm5719-llvm-e35d70fafa065307a97aed65f2e985ffb6365865.zip | |
Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.
Update getLoadStoreRegOpcode to handle GR32_AD.
llvm-svn: 108115
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 55adc263dd5..439f8d259c8 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1960,7 +1960,8 @@ static unsigned getLoadStoreRegOpcode(unsigned Reg, bool load) { if (RC == &X86::GR64RegClass || RC == &X86::GR64_NOSPRegClass) { return load ? X86::MOV64rm : X86::MOV64mr; - } else if (RC == &X86::GR32RegClass || RC == &X86::GR32_NOSPRegClass) { + } else if (RC == &X86::GR32RegClass || RC == &X86::GR32_NOSPRegClass || + RC == &X86::GR32_ADRegClass) { return load ? X86::MOV32rm : X86::MOV32mr; } else if (RC == &X86::GR16RegClass) { return load ? X86::MOV16rm : X86::MOV16mr; |
