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| author | Craig Topper <craig.topper@intel.com> | 2018-08-09 23:27:42 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-08-09 23:27:42 +0000 |
| commit | 9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356 (patch) | |
| tree | b28ddc9e92b578dc1a42bbe15bfb186c6b478fa3 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | a24ecc337f0cad831a5768a0a8f4d00069f78901 (diff) | |
| download | bcm5719-llvm-9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356.tar.gz bcm5719-llvm-9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356.zip | |
[X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts.
This seems to slightly help the performance of one of our internal benchmarks. We probably need better heuristics here.
llvm-svn: 339406
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a7560b70049..25953887376 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33902,10 +33902,12 @@ static SDValue combineMul(SDNode *N, SelectionDAG &DAG, (SignMulAmt >= 0 && (MulAmt2 == 3 || MulAmt2 == 5 || MulAmt2 == 9)))) { if (isPowerOf2_64(MulAmt2) && - !(N->hasOneUse() && N->use_begin()->getOpcode() == ISD::ADD)) + !(SignMulAmt >= 0 && N->hasOneUse() && + N->use_begin()->getOpcode() == ISD::ADD)) // If second multiplifer is pow2, issue it first. We want the multiply by // 3, 5, or 9 to be folded into the addressing mode unless the lone use - // is an add. + // is an add. Only do this for positive multiply amounts since the + // negate would prevent it from being used as an address mode anyway. std::swap(MulAmt1, MulAmt2); if (isPowerOf2_64(MulAmt1)) |
