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authorCraig Topper <craig.topper@intel.com>2018-08-09 23:27:42 +0000
committerCraig Topper <craig.topper@intel.com>2018-08-09 23:27:42 +0000
commit9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356 (patch)
treeb28ddc9e92b578dc1a42bbe15bfb186c6b478fa3
parenta24ecc337f0cad831a5768a0a8f4d00069f78901 (diff)
downloadbcm5719-llvm-9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356.tar.gz
bcm5719-llvm-9a8136f7b489ebbe3ae8ceafc912bc0ad9e90356.zip
[X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts.
This seems to slightly help the performance of one of our internal benchmarks. We probably need better heuristics here. llvm-svn: 339406
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
-rw-r--r--llvm/test/CodeGen/X86/mul-constant-i64.ll4
2 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a7560b70049..25953887376 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -33902,10 +33902,12 @@ static SDValue combineMul(SDNode *N, SelectionDAG &DAG,
(SignMulAmt >= 0 && (MulAmt2 == 3 || MulAmt2 == 5 || MulAmt2 == 9)))) {
if (isPowerOf2_64(MulAmt2) &&
- !(N->hasOneUse() && N->use_begin()->getOpcode() == ISD::ADD))
+ !(SignMulAmt >= 0 && N->hasOneUse() &&
+ N->use_begin()->getOpcode() == ISD::ADD))
// If second multiplifer is pow2, issue it first. We want the multiply by
// 3, 5, or 9 to be folded into the addressing mode unless the lone use
- // is an add.
+ // is an add. Only do this for positive multiply amounts since the
+ // negate would prevent it from being used as an address mode anyway.
std::swap(MulAmt1, MulAmt2);
if (isPowerOf2_64(MulAmt1))
diff --git a/llvm/test/CodeGen/X86/mul-constant-i64.ll b/llvm/test/CodeGen/X86/mul-constant-i64.ll
index 761ca67ab31..af98a34456a 100644
--- a/llvm/test/CodeGen/X86/mul-constant-i64.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-i64.ll
@@ -2119,8 +2119,8 @@ define i64 @test_mul_by_neg10(i64 %x) {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: subl %ecx, %edx
+; X86-NEXT: addl %esi, %esi
; X86-NEXT: leal (%esi,%esi,4), %ecx
-; X86-NEXT: addl %ecx, %ecx
; X86-NEXT: subl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
@@ -2188,8 +2188,8 @@ define i64 @test_mul_by_neg36(i64 %x) {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: subl %ecx, %edx
+; X86-NEXT: shll $2, %esi
; X86-NEXT: leal (%esi,%esi,8), %ecx
-; X86-NEXT: shll $2, %ecx
; X86-NEXT: subl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
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