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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-25 19:58:36 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-25 19:58:36 +0000 |
| commit | 6397963c815b88ebe98ed8376bce042862d59fe2 (patch) | |
| tree | c544f4f042537266105d742f1b2b2308c3aef4d3 /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | 5400a4d0af2d47db9cbb538401bc21bb41793b9e (diff) | |
| download | bcm5719-llvm-6397963c815b88ebe98ed8376bce042862d59fe2.tar.gz bcm5719-llvm-6397963c815b88ebe98ed8376bce042862d59fe2.zip | |
[X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI
Part 2 of 3.
Differential Revision: https://reviews.llvm.org/D31347
llvm-svn: 298780
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 47f20a2b456..547250375aa 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -26661,6 +26661,15 @@ unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode( return Tmp; } + case X86ISD::VSRAI: { + SDValue Src = Op.getOperand(0); + unsigned Tmp = DAG.ComputeNumSignBits(Src, Depth + 1); + unsigned VTBits = Op.getValueType().getScalarSizeInBits(); + APInt ShiftVal = cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue(); + ShiftVal += Tmp; + return ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue(); + } + case X86ISD::PCMPGT: case X86ISD::PCMPEQ: case X86ISD::CMPP: |
