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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-05-09 16:42:16 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-05-09 16:42:16 +0000 |
| commit | afa8b532b14cd358b4ef9a2cf2ce95543785ae53 (patch) | |
| tree | f16a512e40ece37db19bf53945fa4ead464bc512 /llvm/lib/Target/R600/SIISelLowering.cpp | |
| parent | 1127fe4704161c649b6b9d0bf5cd89864e51940c (diff) | |
| download | bcm5719-llvm-afa8b532b14cd358b4ef9a2cf2ce95543785ae53.tar.gz bcm5719-llvm-afa8b532b14cd358b4ef9a2cf2ce95543785ae53.zip | |
R600: Move MIN/MAX matching from LowerOperation() to PerformDAGCombine()
llvm-svn: 208429
Diffstat (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index e6880485078..cacff836774 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -902,12 +902,6 @@ SDValue SITargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { EVT VT = Op.getValueType(); SDLoc DL(Op); - // Possible Min/Max pattern - SDValue MinMax = LowerMinMax(Op, DAG); - if (MinMax.getNode()) { - return MinMax; - } - SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC); return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False); } |
