From afa8b532b14cd358b4ef9a2cf2ce95543785ae53 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 9 May 2014 16:42:16 +0000 Subject: R600: Move MIN/MAX matching from LowerOperation() to PerformDAGCombine() llvm-svn: 208429 --- llvm/lib/Target/R600/SIISelLowering.cpp | 6 ------ 1 file changed, 6 deletions(-) (limited to 'llvm/lib/Target/R600/SIISelLowering.cpp') diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index e6880485078..cacff836774 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -902,12 +902,6 @@ SDValue SITargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { EVT VT = Op.getValueType(); SDLoc DL(Op); - // Possible Min/Max pattern - SDValue MinMax = LowerMinMax(Op, DAG); - if (MinMax.getNode()) { - return MinMax; - } - SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC); return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False); } -- cgit v1.2.3