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author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-15 20:56:03 +0000 |
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committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-15 20:56:03 +0000 |
commit | bdface56995a87b1f48b5a0ede996d604e46fab4 (patch) | |
tree | a99625bf0a8832db7e03586586a00e4ac52aa8f7 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | d9cb0ba66086c0ec826bb5e06b1850e49ca0f000 (diff) | |
download | bcm5719-llvm-bdface56995a87b1f48b5a0ede996d604e46fab4.tar.gz bcm5719-llvm-bdface56995a87b1f48b5a0ede996d604e46fab4.zip |
PowerPC: Lowering floor intrinsic for Altivec
This patch lowers the llvm.floor, llvm.ceil, llvm.trunc, and
llvm.nearbyint to Altivec instruction when using 4 single-precision
float vectors.
llvm-svn: 168086
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index d51baa6a576..7d97450676e 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -402,6 +402,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal); setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); + setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); + setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); + setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass); addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass); |