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| author | Chris Lattner <sabre@nondot.org> | 2006-02-22 00:56:39 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-02-22 00:56:39 +0000 |
| commit | 7ad77dfc2add2ccfe65318a984ee17435bc02a3c (patch) | |
| tree | f2ea5616f40a850e8c81d941533672ae7eb751b4 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | cd78df1e85a9993b7c9f3a44888eead2195a5161 (diff) | |
| download | bcm5719-llvm-7ad77dfc2add2ccfe65318a984ee17435bc02a3c.tar.gz bcm5719-llvm-7ad77dfc2add2ccfe65318a984ee17435bc02a3c.zip | |
split register class handling from explicit physreg handling.
llvm-svn: 26308
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 243c51d7c9d..003d16c26b1 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -999,8 +999,8 @@ PPCTargetLowering::getConstraintType(char ConstraintLetter) const { std::vector<unsigned> PPCTargetLowering:: -getRegForInlineAsmConstraint(const std::string &Constraint, - MVT::ValueType VT) const { +getRegClassForInlineAsmConstraint(const std::string &Constraint, + MVT::ValueType VT) const { if (Constraint.size() == 1) { switch (Constraint[0]) { // GCC RS6000 Constraint Letters default: break; // Unknown constriant letter @@ -1051,8 +1051,7 @@ getRegForInlineAsmConstraint(const std::string &Constraint, } } - // Handle explicit register names. - return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); + return std::vector<unsigned>(); } // isOperandValidForConstraint |
