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authorChris Lattner <sabre@nondot.org>2007-11-28 18:44:47 +0000
committerChris Lattner <sabre@nondot.org>2007-11-28 18:44:47 +0000
commit57ee7c66307fc3bb211a2e3b90a760dfe978ecf6 (patch)
tree6ca2d95d40c48b063a8b3d792071244bd48b83a6 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp
parent749478a61b89ddf67582d0b3e67e43e4ed126d58 (diff)
downloadbcm5719-llvm-57ee7c66307fc3bb211a2e3b90a760dfe978ecf6.tar.gz
bcm5719-llvm-57ee7c66307fc3bb211a2e3b90a760dfe978ecf6.zip
Implement ExpandOperationResult for ppc i64 fp->int, which fixes
CodeGen/Generic/fp_to_int.ll among others. Its unclear why this just started failing... llvm-svn: 44407
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 4d577adfc6e..cf6ce8a1a04 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2076,6 +2076,7 @@ static SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG) {
return SDOperand();
}
+// FIXME: Split this code up when LegalizeDAGTypes lands.
static SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) {
assert(MVT::isFloatingPoint(Op.getOperand(0).getValueType()));
SDOperand Src = Op.getOperand(0);
@@ -3042,6 +3043,14 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return SDOperand();
}
+SDNode *PPCTargetLowering::ExpandOperationResult(SDNode *N, SelectionDAG &DAG) {
+ switch (N->getOpcode()) {
+ default: assert(0 && "Wasn't expecting to be able to lower this!");
+ case ISD::FP_TO_SINT: return LowerFP_TO_SINT(SDOperand(N, 0), DAG).Val;
+ }
+}
+
+
//===----------------------------------------------------------------------===//
// Other Lowering Code
//===----------------------------------------------------------------------===//
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