From 57ee7c66307fc3bb211a2e3b90a760dfe978ecf6 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 28 Nov 2007 18:44:47 +0000 Subject: Implement ExpandOperationResult for ppc i64 fp->int, which fixes CodeGen/Generic/fp_to_int.ll among others. Its unclear why this just started failing... llvm-svn: 44407 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 4d577adfc6e..cf6ce8a1a04 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2076,6 +2076,7 @@ static SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG) { return SDOperand(); } +// FIXME: Split this code up when LegalizeDAGTypes lands. static SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { assert(MVT::isFloatingPoint(Op.getOperand(0).getValueType())); SDOperand Src = Op.getOperand(0); @@ -3042,6 +3043,14 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { return SDOperand(); } +SDNode *PPCTargetLowering::ExpandOperationResult(SDNode *N, SelectionDAG &DAG) { + switch (N->getOpcode()) { + default: assert(0 && "Wasn't expecting to be able to lower this!"); + case ISD::FP_TO_SINT: return LowerFP_TO_SINT(SDOperand(N, 0), DAG).Val; + } +} + + //===----------------------------------------------------------------------===// // Other Lowering Code //===----------------------------------------------------------------------===// -- cgit v1.2.3