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| author | Chuang-Yu Cheng <cycheng@multicorewareinc.com> | 2016-04-26 07:38:24 +0000 |
|---|---|---|
| committer | Chuang-Yu Cheng <cycheng@multicorewareinc.com> | 2016-04-26 07:38:24 +0000 |
| commit | 0600e8d759b4addedc5a0fbdf6a7e52d4504ec4f (patch) | |
| tree | b543f784f54809dad9aa45e14f89755ccd34a1de /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 9163f4997aa2069af9eee1b0f2689df143d014ee (diff) | |
| download | bcm5719-llvm-0600e8d759b4addedc5a0fbdf6a7e52d4504ec4f.tar.gz bcm5719-llvm-0600e8d759b4addedc5a0fbdf6a7e52d4504ec4f.zip | |
[ppc64] Reenable sibling call optimization on ppc64 since fixed tsan library tail-call issue
print-stack-trace.cc test failure of compiler-rt has been fixed by
r266869 (http://reviews.llvm.org/D19148), so reenable sibling call
optimization on ppc64
Reviewers: nemanjai kbarton
llvm-svn: 267527
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 0ae4e5ebd09..72335a4f999 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -55,7 +55,7 @@ cl::desc("disable setting the node scheduling preference to ILP on PPC"), cl::Hi static cl::opt<bool> DisablePPCUnaligned("disable-ppc-unaligned", cl::desc("disable unaligned load/store generation on PPC"), cl::Hidden); -static cl::opt<bool> DisableSCO("disable-ppc-sco", cl::init(true), +static cl::opt<bool> DisableSCO("disable-ppc-sco", cl::desc("disable sibling call optimization on ppc"), cl::Hidden); STATISTIC(NumTailCalls, "Number of tail calls"); |
