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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-31 20:49:24 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-01-31 20:49:24 +0000 |
| commit | 1108ee2496d5db8229e41310322f2d9cd6210c8f (patch) | |
| tree | 7f2b659af3f7916b89a07bc8b8545fdf2af56c34 /llvm/lib/Target/Hexagon/HexagonPatterns.td | |
| parent | 8f2df9d26c6071adeac0f82a8c896a7f52a19cb4 (diff) | |
| download | bcm5719-llvm-1108ee2496d5db8229e41310322f2d9cd6210c8f.tar.gz bcm5719-llvm-1108ee2496d5db8229e41310322f2d9cd6210c8f.zip | |
[Hexagon] Implement HVX codegen for vector shifts
llvm-svn: 323914
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonPatterns.td')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonPatterns.td | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td index bcedf879dea..06e23e24991 100644 --- a/llvm/lib/Target/Hexagon/HexagonPatterns.td +++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td @@ -3095,19 +3095,33 @@ let Predicates = [UseHVX] in { def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v32i8)), (V6_vasrh (V6_vaslh HVI16:$Vs, (A2_tfrsi 8)), (A2_tfrsi 8))>; def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v16i8)), - (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; + (V6_vasrw (V6_vaslw HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v16i16)), - (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; + (V6_vasrw (V6_vaslw HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; } let Predicates = [UseHVX,UseHVX128B] in { def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v64i8)), (V6_vasrh (V6_vaslh HVI16:$Vs, (A2_tfrsi 8)), (A2_tfrsi 8))>; def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i8)), - (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; + (V6_vasrw (V6_vaslw HVI32:$Vs, (A2_tfrsi 24)), (A2_tfrsi 24))>; def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i16)), - (V6_vasrh (V6_vaslh HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; + (V6_vasrw (V6_vaslw HVI32:$Vs, (A2_tfrsi 16)), (A2_tfrsi 16))>; } + def: Pat<(HexagonVASL HVI16:$Vs, I32:$Rt), (V6_vaslh HvxVR:$Vs, I32:$Rt)>; + def: Pat<(HexagonVASL HVI32:$Vs, I32:$Rt), (V6_vaslw HvxVR:$Vs, I32:$Rt)>; + def: Pat<(HexagonVASR HVI16:$Vs, I32:$Rt), (V6_vasrh HvxVR:$Vs, I32:$Rt)>; + def: Pat<(HexagonVASR HVI32:$Vs, I32:$Rt), (V6_vasrw HvxVR:$Vs, I32:$Rt)>; + def: Pat<(HexagonVLSR HVI16:$Vs, I32:$Rt), (V6_vlsrh HvxVR:$Vs, I32:$Rt)>; + def: Pat<(HexagonVLSR HVI32:$Vs, I32:$Rt), (V6_vlsrw HvxVR:$Vs, I32:$Rt)>; + + def: Pat<(shl HVI16:$Vs, HVI16:$Vt), (V6_vaslhv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(shl HVI32:$Vs, HVI32:$Vt), (V6_vaslwv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(sra HVI16:$Vs, HVI16:$Vt), (V6_vasrhv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(sra HVI32:$Vs, HVI32:$Vt), (V6_vasrwv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(srl HVI16:$Vs, HVI16:$Vt), (V6_vlsrhv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(srl HVI32:$Vs, HVI32:$Vt), (V6_vlsrwv HvxVR:$Vs, HvxVR:$Vt)>; + def: Pat<(VecI8 (trunc HWI16:$Vss)), (V6_vpackeb (HiVec $Vss), (LoVec $Vss))>; def: Pat<(VecI16 (trunc HWI32:$Vss)), |
