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| author | Dan Gohman <gohman@apple.com> | 2008-04-14 17:55:48 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-04-14 17:55:48 +0000 |
| commit | 2505d867836d32031c07775ea1b06a76b713ee2a (patch) | |
| tree | 481fd3e430c1e11548f0a417be73264ecdc8f33d /llvm/lib/Target/ARM | |
| parent | d80edddccd43529a79e478f995b5fc8502411566 (diff) | |
| download | bcm5719-llvm-2505d867836d32031c07775ea1b06a76b713ee2a.tar.gz bcm5719-llvm-2505d867836d32031c07775ea1b06a76b713ee2a.zip | |
Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.
llvm-svn: 49666
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 0095352c415..6a581f715fd 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -1247,8 +1247,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff){ + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff){ // Do repeated 4-byte loads and stores. To be improved. // This requires 4-byte alignment. if ((Align & 3) != 0) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h index 58d8d8c6c86..13f5c083753 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.h +++ b/llvm/lib/Target/ARM/ARMISelLowering.h @@ -149,8 +149,8 @@ namespace llvm { SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff); + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff); }; } |
