diff options
author | Dan Gohman <gohman@apple.com> | 2008-04-14 17:55:48 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2008-04-14 17:55:48 +0000 |
commit | 2505d867836d32031c07775ea1b06a76b713ee2a (patch) | |
tree | 481fd3e430c1e11548f0a417be73264ecdc8f33d /llvm/lib/Target | |
parent | d80edddccd43529a79e478f995b5fc8502411566 (diff) | |
download | bcm5719-llvm-2505d867836d32031c07775ea1b06a76b713ee2a.tar.gz bcm5719-llvm-2505d867836d32031c07775ea1b06a76b713ee2a.zip |
Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.
llvm-svn: 49666
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.h | 4 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 6 |
4 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 0095352c415..6a581f715fd 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -1247,8 +1247,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff){ + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff){ // Do repeated 4-byte loads and stores. To be improved. // This requires 4-byte alignment. if ((Align & 3) != 0) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h index 58d8d8c6c86..13f5c083753 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.h +++ b/llvm/lib/Target/ARM/ARMISelLowering.h @@ -149,8 +149,8 @@ namespace llvm { SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff); + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff); }; } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ac58ab4f05c..38e6342ae65 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4664,7 +4664,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, - Value *DstSV, uint64_t DstOff) { + const Value *DstSV, uint64_t DstOff) { ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); /// If not DWORD aligned or size is more than the threshold, call the library. @@ -4804,8 +4804,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff){ + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff){ // This requires the copy size to be a constant, preferrably // within a subtarget-specific limit. diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index fea2d2b3577..e3000dbc2cb 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -550,14 +550,14 @@ namespace llvm { SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, - Value *DstSV, uint64_t DstOff); + const Value *DstSV, uint64_t DstOff); SDOperand EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDOperand Chain, SDOperand Dst, SDOperand Src, SDOperand Size, unsigned Align, bool AlwaysInline, - Value *DstSV, uint64_t DstOff, - Value *SrcSV, uint64_t SrcOff); + const Value *DstSV, uint64_t DstOff, + const Value *SrcSV, uint64_t SrcOff); }; } |