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| author | Silviu Baranga <silviu.baranga@arm.com> | 2012-04-18 14:18:57 +0000 |
|---|---|---|
| committer | Silviu Baranga <silviu.baranga@arm.com> | 2012-04-18 14:18:57 +0000 |
| commit | ca45af9a755c454cbaa131b3823b9cab118c1fe5 (patch) | |
| tree | cfba8e7a5ad093359aff7fdff30291b59a621594 /llvm/lib/Target/ARM/Disassembler | |
| parent | d5c6a63a500f903c1e2430e27a3ed9fbb62f935a (diff) | |
| download | bcm5719-llvm-ca45af9a755c454cbaa131b3823b9cab118c1fe5.tar.gz bcm5719-llvm-ca45af9a755c454cbaa131b3823b9cab118c1fe5.zip | |
Added support for disassembling unpredictable swp/swpb ARM instructions.
llvm-svn: 155004
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 87a5f019d4a..912935db17a 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -4310,6 +4310,10 @@ static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, return DecodeCPSInstruction(Inst, Insn, Address, Decoder); DecodeStatus S = MCDisassembler::Success; + + if (Rt == Rn || Rn == Rt2) + S = MCDisassembler::SoftFail; + if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) return MCDisassembler::Fail; if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) |
