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| author | Tilmann Scheller <t.scheller@samsung.com> | 2014-07-23 13:03:47 +0000 |
|---|---|---|
| committer | Tilmann Scheller <t.scheller@samsung.com> | 2014-07-23 13:03:47 +0000 |
| commit | 2727279117eac8671597fe457ac7ef3c5d82abe6 (patch) | |
| tree | 369c8107b58c562c8ed3983ad42788028002c938 /llvm/lib/Target/ARM/AsmParser | |
| parent | a4d18fc60686ff0d9a138dce6b5ff6f650aa2cb0 (diff) | |
| download | bcm5719-llvm-2727279117eac8671597fe457ac7ef3c5d82abe6.tar.gz bcm5719-llvm-2727279117eac8671597fe457ac7ef3c5d82abe6.zip | |
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRB instructions.
The ARM ARM prohibits STRB instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STRB instructions with unpredictable behavior.
llvm-svn: 213750
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 5e074c4e429..ccef6c3b6cb 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5731,7 +5731,11 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst, case ARM::STR_PRE_IMM: case ARM::STR_PRE_REG: case ARM::STR_POST_IMM: - case ARM::STR_POST_REG: { + case ARM::STR_POST_REG: + case ARM::STRB_PRE_IMM: + case ARM::STRB_PRE_REG: + case ARM::STRB_POST_IMM: + case ARM::STRB_POST_REG: { // Rt must be different from Rn. const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); |
