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authorDavid Green <david.green@arm.com>2019-06-08 10:09:02 +0000
committerDavid Green <david.green@arm.com>2019-06-08 10:09:02 +0000
commit4ecce205d52c8979279b4ebf5a8e7ee4d3c8c18a (patch)
treeee0a04b7fcf2d0dc9a847fdaadaf3f260bee30b8 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent990eb2d1e83ed1f046c2435fd20b5996a95ce885 (diff)
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[ARM] Add fp16 addressing to isLegalT2AddressImmediate
The fp16 version of VLDR takes a imm8 multiplied by 2. This updates the costs to account for those, and adds extra testing. It is dependant upon hasFPRegs16 as this is what the load/store instructions require. Differential Revision: https://reviews.llvm.org/D62966 llvm-svn: 362872
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index ad84f036f24..c31056186de 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13300,6 +13300,9 @@ static bool isLegalT2AddressImmediate(int64_t V, EVT VT,
unsigned NumBytes = std::max(VT.getSizeInBits() / 8, 1U);
+ // half VLDR: 2 * imm8
+ if (VT.isFloatingPoint() && NumBytes == 2 && Subtarget->hasFPRegs16())
+ return isShiftedUInt<8, 1>(V);
// VLDR and LDRD: 4 * imm8
if ((VT.isFloatingPoint() && Subtarget->hasVFP2Base()) || NumBytes == 8)
return isShiftedUInt<8, 2>(V);
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