From 4ecce205d52c8979279b4ebf5a8e7ee4d3c8c18a Mon Sep 17 00:00:00 2001 From: David Green Date: Sat, 8 Jun 2019 10:09:02 +0000 Subject: [ARM] Add fp16 addressing to isLegalT2AddressImmediate The fp16 version of VLDR takes a imm8 multiplied by 2. This updates the costs to account for those, and adds extra testing. It is dependant upon hasFPRegs16 as this is what the load/store instructions require. Differential Revision: https://reviews.llvm.org/D62966 llvm-svn: 362872 --- llvm/lib/Target/ARM/ARMISelLowering.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp') diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index ad84f036f24..c31056186de 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -13300,6 +13300,9 @@ static bool isLegalT2AddressImmediate(int64_t V, EVT VT, unsigned NumBytes = std::max(VT.getSizeInBits() / 8, 1U); + // half VLDR: 2 * imm8 + if (VT.isFloatingPoint() && NumBytes == 2 && Subtarget->hasFPRegs16()) + return isShiftedUInt<8, 1>(V); // VLDR and LDRD: 4 * imm8 if ((VT.isFloatingPoint() && Subtarget->hasVFP2Base()) || NumBytes == 8) return isShiftedUInt<8, 2>(V); -- cgit v1.2.3