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| author | Mihai Popa <mihail.popa@gmail.com> | 2013-05-20 14:42:43 +0000 |
|---|---|---|
| committer | Mihai Popa <mihail.popa@gmail.com> | 2013-05-20 14:42:43 +0000 |
| commit | dcf092272072ebfdbbde31326d33003bb33776d4 (patch) | |
| tree | 6c03f08807f08d54c9467c4d10288235206f3573 /llvm/lib/Target/ARM/ARMCodeEmitter.cpp | |
| parent | 92bbd3e818388503156fa632786d2205bba67069 (diff) | |
| download | bcm5719-llvm-dcf092272072ebfdbbde31326d33003bb33776d4.tar.gz bcm5719-llvm-dcf092272072ebfdbbde31326d33003bb33776d4.zip | |
Q registers are encoded in fields of the same length as D registers. As Q registers are half as many, the ARM reference manual mandates the least significant bit to be zeroed out. Failure to do so should result in an undefined instruction. With this change test/MC/Disassembler/ARM/invalid-VQADD-arm.txt is passing (removed XFAIL).
llvm-svn: 182279
Diffstat (limited to 'llvm/lib/Target/ARM/ARMCodeEmitter.cpp')
0 files changed, 0 insertions, 0 deletions
