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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-22 04:03:35 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-12-22 04:03:35 +0000
commit46e6b7adef59d96f30c173ac6ade57d81d7c7b1e (patch)
treea465151a03a5ee3da1a74ceda2adb59d52dab9d6 /llvm/lib/Target/AMDGPU/SIISelLowering.h
parent770ec8680a0a1404fa7dc524ae2861ffdc5901eb (diff)
downloadbcm5719-llvm-46e6b7adef59d96f30c173ac6ade57d81d7c7b1e.tar.gz
bcm5719-llvm-46e6b7adef59d96f30c173ac6ade57d81d7c7b1e.zip
AMDGPU: Check fast math flags in fadd/fsub combines
llvm-svn: 290312
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.h')
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index d7127193f05..9583f6db6fa 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -83,7 +83,8 @@ class SITargetLowering final : public AMDGPUTargetLowering {
SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
- unsigned getFusedOpcode(const SelectionDAG &DAG, EVT VT) const;
+ unsigned getFusedOpcode(const SelectionDAG &DAG,
+ const SDNode *N0, const SDNode *N1) const;
SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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