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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:55:35 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 03:55:35 +0000 |
| commit | 770ec8680a0a1404fa7dc524ae2861ffdc5901eb (patch) | |
| tree | ce4dc183f53a90dbaca0af167357d2b75920ec9d /llvm/lib/Target/AMDGPU/SIISelLowering.h | |
| parent | e27c6dfd317b4a9a4aa6aacabfed0fa5d2dcc26d (diff) | |
| download | bcm5719-llvm-770ec8680a0a1404fa7dc524ae2861ffdc5901eb.tar.gz bcm5719-llvm-770ec8680a0a1404fa7dc524ae2861ffdc5901eb.zip | |
AMDGPU: Form more FMAs if fusion is allowed
Extend the existing fadd/fsub->fmad combines to produce
FMA if allowed.
llvm-svn: 290311
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h index 5f3c4ce51bd..d7127193f05 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.h +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h @@ -83,6 +83,7 @@ class SITargetLowering final : public AMDGPUTargetLowering { SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const; + unsigned getFusedOpcode(const SelectionDAG &DAG, EVT VT) const; SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const; |
