GlobalISel: represent atomic loads & stores via the MachineMemOperand.

Also make sure the AArch64 backend doesn't try to convert them into normal
loads and stores.

llvm-svn: 294993

1 files changed, 6 insertions, 0 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 42b4daf2318..6bced17d09d 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -691,6 +691,12 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
       return false;
     }
 
+    auto &MemOp = **I.memoperands_begin();
+    if (MemOp.getOrdering() != AtomicOrdering::NotAtomic) {
+      DEBUG(dbgs() << "Atomic load/store not supported yet\n");
+      return false;
+    }
+
 #ifndef NDEBUG
     // Sanity-check the pointer register.
     const unsigned PtrReg = I.getOperand(1).getReg();