From 48dfa1a6ed81f0d0d52b8172f823bbaab27f11ed Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Mon, 13 Feb 2017 22:14:16 +0000 Subject: GlobalISel: represent atomic loads & stores via the MachineMemOperand. Also make sure the AArch64 backend doesn't try to convert them into normal loads and stores. llvm-svn: 294993 --- llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp') diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 42b4daf2318..6bced17d09d 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -691,6 +691,12 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const { return false; } + auto &MemOp = **I.memoperands_begin(); + if (MemOp.getOrdering() != AtomicOrdering::NotAtomic) { + DEBUG(dbgs() << "Atomic load/store not supported yet\n"); + return false; + } + #ifndef NDEBUG // Sanity-check the pointer register. const unsigned PtrReg = I.getOperand(1).getReg(); -- cgit v1.2.3