summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2010-12-17 01:21:12 +0000
committerBob Wilson <bob.wilson@apple.com>2010-12-17 01:21:12 +0000
commitbfc6904fc65434ab2216807248918d9dacafe6ee (patch)
treedf3c69b25b034e04cf7c24e21994a2a37f839ee5 /llvm/lib/CodeGen/SelectionDAG
parent261aad8e169cd93958651be86d4c3bbb654e26c9 (diff)
downloadbcm5719-llvm-bfc6904fc65434ab2216807248918d9dacafe6ee.tar.gz
bcm5719-llvm-bfc6904fc65434ab2216807248918d9dacafe6ee.zip
Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.
Radar 8776599 llvm-svn: 122018
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
index 3ba8b3690ad..86f88f1f179 100644
--- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -543,9 +543,7 @@ void InstrEmitter::EmitRegSequence(SDNode *Node,
const TargetRegisterClass *TRC = MRI->getRegClass(SubReg);
const TargetRegisterClass *SRC =
TRI->getMatchingSuperRegClass(RC, TRC, SubIdx);
- if (!SRC)
- llvm_unreachable("Invalid subregister index in REG_SEQUENCE");
- if (SRC != RC) {
+ if (SRC && SRC != RC) {
MRI->setRegClass(NewVReg, SRC);
RC = SRC;
}
OpenPOWER on IntegriCloud