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authorAndrew Trick <atrick@apple.com>2012-03-07 05:21:40 +0000
committerAndrew Trick <atrick@apple.com>2012-03-07 05:21:40 +0000
commitedee68ce1ba280e4463efbf9eb88dddf53176785 (patch)
treeef42ea675939df828dd1341e4363c466e4150cc6 /llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
parent46a58664f7c9a4a15988074fd5d6ae11992b4b21 (diff)
downloadbcm5719-llvm-edee68ce1ba280e4463efbf9eb88dddf53176785.tar.gz
bcm5719-llvm-edee68ce1ba280e4463efbf9eb88dddf53176785.zip
misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence. llvm-svn: 152205
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 1a1fab0b310..195f4884530 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -327,6 +327,12 @@ void ScheduleDAGRRList::Schedule() {
ListScheduleBottomUp();
AvailableQueue->releaseState();
+
+ DEBUG({
+ dbgs() << "*** Final schedule ***\n";
+ dumpSchedule();
+ dbgs() << '\n';
+ });
}
//===----------------------------------------------------------------------===//
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