summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineInstr.cpp
diff options
context:
space:
mode:
authorQuentin Colombet <qcolombet@apple.com>2016-02-11 18:22:37 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-02-11 18:22:37 +0000
commit9855111b775a277a00ae84dd63d3c56e12a0f12b (patch)
tree276475b213e7ebd52382913c2cdc6794452062f4 /llvm/lib/CodeGen/MachineInstr.cpp
parenta8455f2e2b42d981a940655c11f40264388d2d39 (diff)
downloadbcm5719-llvm-9855111b775a277a00ae84dd63d3c56e12a0f12b.tar.gz
bcm5719-llvm-9855111b775a277a00ae84dd63d3c56e12a0f12b.zip
[GlobalISel] Add a type to MachineInstr.
We actually need that information only for generic instructions, therefore it would be nice not to have to pay the extra memory consumption for all instructions. Especially because a typed non-generic instruction does not make sense. The question is then, is it possible to have that information in a union or something? My initial thought was that we could have a derived class GenericMachineInstr with additional information, but in practice it makes little to no sense since generic MachineInstrs are likely turned into non-generic ones by just switching the opcode. In other words, we don't want to go through the process of creating a new, non-generic MachineInstr, object each time we do this switch. The memory benefit probably is not worth the extra compile time. Another option would be to keep the type of the MachineInstr in a side table. This would induce an extra indirection though. Anyway, I will file a PR to discuss about it and remember we need to come back to it at some point. llvm-svn: 260558
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp25
1 files changed, 20 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 37573f5928e..805acb93efd 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -653,7 +653,12 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
DebugLoc dl, bool NoImp)
: MCID(&tid), Parent(nullptr), Operands(nullptr), NumOperands(0), Flags(0),
AsmPrinterFlags(0), NumMemRefs(0), MemRefs(nullptr),
- debugLoc(std::move(dl)) {
+ debugLoc(std::move(dl))
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ ,
+ Ty(nullptr)
+#endif
+{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
// Reserve space for the expected number of operands.
@@ -670,10 +675,14 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
/// MachineInstr ctor - Copies MachineInstr arg exactly
///
MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
- : MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
- Flags(0), AsmPrinterFlags(0),
- NumMemRefs(MI.NumMemRefs), MemRefs(MI.MemRefs),
- debugLoc(MI.getDebugLoc()) {
+ : MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
+ Flags(0), AsmPrinterFlags(0), NumMemRefs(MI.NumMemRefs),
+ MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ ,
+ Ty(nullptr)
+#endif
+{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
CapOperands = OperandCapacity::get(MI.getNumOperands());
@@ -1677,6 +1686,12 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
else
OS << "UNKNOWN";
+
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ if (Ty)
+ OS << ' ' << *Ty << ' ';
+#endif
+
if (SkipOpers)
return;
OpenPOWER on IntegriCloud