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-rw-r--r--llvm/include/llvm/CodeGen/MachineInstr.h23
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp25
2 files changed, 43 insertions, 5 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
index f3100ccf633..3e37c322700 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -38,6 +38,9 @@ template <typename T> class SmallVectorImpl;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+class Type;
+#endif
class MachineFunction;
class MachineMemOperand;
@@ -102,6 +105,13 @@ private:
DebugLoc debugLoc; // Source line information.
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ /// Type of the instruction in case of a generic opcode.
+ /// \invariant This must be nullptr is getOpcode() is not
+ /// in the range of generic opcodes.
+ Type *Ty;
+#endif
+
MachineInstr(const MachineInstr&) = delete;
void operator=(const MachineInstr&) = delete;
// Use MachineFunction::DeleteMachineInstr() instead.
@@ -176,6 +186,19 @@ public:
Flags &= ~((uint8_t)Flag);
}
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ /// Set the type of the instruction.
+ /// \pre getOpcode() is in the range of the generic opcodes.
+ void setType(Type *Ty) {
+ assert(
+ (!Ty || (getOpcode() >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START &&
+ getOpcode() <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END)) &&
+ "Non generic instructions are not supposed to be typed");
+ this->Ty = Ty;
+ }
+ Type *getType() const { return Ty; }
+#endif
+
/// Return true if MI is in a bundle (but not the first MI in a bundle).
///
/// A bundle looks like this before it's finalized:
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 37573f5928e..805acb93efd 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -653,7 +653,12 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
DebugLoc dl, bool NoImp)
: MCID(&tid), Parent(nullptr), Operands(nullptr), NumOperands(0), Flags(0),
AsmPrinterFlags(0), NumMemRefs(0), MemRefs(nullptr),
- debugLoc(std::move(dl)) {
+ debugLoc(std::move(dl))
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ ,
+ Ty(nullptr)
+#endif
+{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
// Reserve space for the expected number of operands.
@@ -670,10 +675,14 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
/// MachineInstr ctor - Copies MachineInstr arg exactly
///
MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
- : MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
- Flags(0), AsmPrinterFlags(0),
- NumMemRefs(MI.NumMemRefs), MemRefs(MI.MemRefs),
- debugLoc(MI.getDebugLoc()) {
+ : MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0),
+ Flags(0), AsmPrinterFlags(0), NumMemRefs(MI.NumMemRefs),
+ MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ ,
+ Ty(nullptr)
+#endif
+{
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
CapOperands = OperandCapacity::get(MI.getNumOperands());
@@ -1677,6 +1686,12 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
else
OS << "UNKNOWN";
+
+#ifdef LLVM_BUILD_GLOBAL_ISEL
+ if (Ty)
+ OS << ' ' << *Ty << ' ';
+#endif
+
if (SkipOpers)
return;
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