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| author | Chris Lattner <sabre@nondot.org> | 2006-05-04 01:15:02 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-05-04 01:15:02 +0000 |
| commit | 940cc978ef23d2f3e35904a6ebd9bd456b00f963 (patch) | |
| tree | 822748e264b11daf9d5c17416f7d1b9f164c294b /llvm/lib/CodeGen/MachineInstr.cpp | |
| parent | 6e663f1c1ec03c8660a0987e6be8f4d872c78445 (diff) | |
| download | bcm5719-llvm-940cc978ef23d2f3e35904a6ebd9bd456b00f963.tar.gz bcm5719-llvm-940cc978ef23d2f3e35904a6ebd9bd456b00f963.zip | |
Remove a bunch more SparcV9 specific stuff
llvm-svn: 28093
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 3d65dfd31bd..367631c60ec 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -141,7 +141,7 @@ MachineInstr::SetMachineOperandConst(unsigned i, void MachineInstr::SetMachineOperandReg(unsigned i, int regNum) { assert(i < getNumOperands()); // must be explicit op - operands[i].opType = MachineOperand::MO_MachineRegister; + operands[i].opType = MachineOperand::MO_VirtualRegister; operands[i].contents.value = NULL; operands[i].extra.regNum = regNum; } @@ -187,9 +187,6 @@ static void print(const MachineOperand &MO, std::ostream &OS, if (MO.hasAllocatedReg()) OutputReg(OS, MO.getReg(), MRI); break; - case MachineOperand::MO_MachineRegister: - OutputReg(OS, MO.getMachineRegNum(), MRI); - break; case MachineOperand::MO_SignExtendedImmed: OS << (long)MO.getImmedValue(); break; @@ -297,9 +294,6 @@ std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) { OutputValue(OS, MO.getVRegValue()); } break; - case MachineOperand::MO_MachineRegister: - OutputReg(OS, MO.getMachineRegNum()); - break; case MachineOperand::MO_SignExtendedImmed: OS << (long)MO.getImmedValue(); break; |
