Added scientific notation supports for integers and floats

Also support was added for real numbers especially thinking in generics.
Files called scientific.vhd and scientific.v were added for test.

1 files changed, 36 insertions, 0 deletions

diff --git a/translated_examples/scientific.v b/translated_examples/scientific.v
new file mode 100644
index 0000000..e5b301b
--- /dev/null
+++ b/translated_examples/scientific.v
@@ -0,0 +1,36 @@
+// File scientific.vhd translated with vhd2vl v2.5 VHDL to Verilog RTL translator
+// vhd2vl settings:
+//  * Verilog Module Declaration Style: 1995
+
+// vhd2vl is Free (libre) Software:
+//   Copyright (C) 2001 Vincenzo Liguori - Ocean Logic Pty Ltd
+//     http://www.ocean-logic.com
+//   Modifications Copyright (C) 2006 Mark Gonzales - PMC Sierra Inc
+//   Modifications (C) 2010 Shankar Giri
+//   Modifications Copyright (C) 2002, 2005, 2008-2010, 2015 Larry Doolittle - LBNL
+//     http://doolittle.icarus.com/~larry/vhd2vl/
+//
+//   vhd2vl comes with ABSOLUTELY NO WARRANTY.  Always check the resulting
+//   Verilog for correctness, ideally with a formal verification tool.
+//
+//   You are welcome to redistribute vhd2vl under certain conditions.
+//   See the license (GPLv2) file included with the source for details.
+
+// The result of translation follows.  Its copyright status should be
+// considered unchanged from the original VHDL.
+
+
+module Scientific(
+clk
+);
+
+parameter [31:0] exp1=25e6;
+parameter [31:0] exp2=25E6;
+parameter exp3=25.0e6;
+input clk;
+
+wire clk;
+
+
+
+endmodule