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| author | Rodrigo Alejandro Melo <rmelo@inti.gob.ar> | 2017-11-17 11:33:30 -0300 |
|---|---|---|
| committer | Rodrigo Alejandro Melo <rmelo@inti.gob.ar> | 2017-11-17 11:33:30 -0300 |
| commit | b9b93adac2d304792b33455542a84d2f310a82ef (patch) | |
| tree | 2c45383c79d0bb0754584bb972576cc20f26aa2a /translated_examples/expr.v | |
| parent | 48dc1011e34dfdcf11f9c4b3e68145a83e53db68 (diff) | |
| download | vhdl2vl-b9b93adac2d304792b33455542a84d2f310a82ef.tar.gz vhdl2vl-b9b93adac2d304792b33455542a84d2f310a82ef.zip | |
Removed unuseful parentheses
Diffstat (limited to 'translated_examples/expr.v')
| -rw-r--r-- | translated_examples/expr.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/translated_examples/expr.v b/translated_examples/expr.v index 2fb8849..bf1a529 100644 --- a/translated_examples/expr.v +++ b/translated_examples/expr.v @@ -17,9 +17,9 @@ wire [8:0] input_status; wire enable; wire debug; wire aux; wire outy; wire dv; wire value; // drive input status - assign input_status = {foo[9:4],((((baz[2:0] & foo[3:0])) | (( ~baz[2:0] & bam[3:0]))))}; + assign input_status = {foo[9:4],(baz[2:0] & foo[3:0]) | ( ~baz[2:0] & bam[3:0])}; // drive based on foo - assign out_i[4] = ((enable & ((aux ^ outy)))) | ((debug & dv & ~enable)) | (( ~debug & ~enable & value)); + assign out_i[4] = (enable & (aux ^ outy)) | (debug & dv & ~enable) | ( ~debug & ~enable & value); // not drive always @(negedge reset, negedge sysclk) begin if((reset != 1'b0)) begin |
