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authorRodrigo Alejandro Melo <rodrigomelo9@gmail.com>2017-02-09 22:13:16 -0300
committerRodrigo Alejandro Melo <rodrigomelo9@gmail.com>2017-02-09 22:15:43 -0300
commit4a0c6c57511eabbb32031d468ec09ce7987cc680 (patch)
tree4c53bcd3c182e91d86844ff48f785a81cbcef84d /.gitignore
parent420ac28acaca59a10ed3f032dc60d610e2eb6376 (diff)
downloadvhdl2vl-4a0c6c57511eabbb32031d468ec09ce7987cc680.tar.gz
vhdl2vl-4a0c6c57511eabbb32031d468ec09ce7987cc680.zip
Space deleted in the <size>'<radix><number> notation
It seems to be the more common approach and the VHDL notation BASE#NUMBER# is translated without spaces. On the other hand, the space gives an error with Yosys synthesizer. Files on translated_examples were modified.
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diff --git a/.gitignore b/.gitignore
index d7bde97..c8dd9c9 100644
--- a/.gitignore
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@@ -1,4 +1,5 @@
temp
+ignore
src/*.c
src/*.h
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