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* Fast reboot for P8Benjamin Herrenschmidt2016-10-171-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an experimental patch that implements "Fast reboot" on P8 machines. The basic idea is that when the OS calls OPAL reboot, we gather all the threads in the system using a combination of patching the reset vector and soft-resetting them, then cleanup a few bits of hardware (we do re-probe PCIe for example), and reload & restart the bootloader. For Trusted Boot, this means we *add* measurements to the TPM, so you will get *different* PCR values as compared to a full IPL. This makes sense as if you want to be sure you are running something known then, well, do a full IPL as soft reset should never be trusted to clear any malicious code. This is very experimental and needs a lot of testing and also auditing code for other bits of HW that might need to be cleaned up. BenH TODO: I also need to check if we are properly PERST'ing PCI devices. This is partially based on old code I had to do that on P7. I only support it on P8 though as there are issues with the PSI interrupts on P7 that cannot be reliably solved. Even though this should be considered somewhat experimental, we've had a lot of success on a variety of machines. Dozens/hundreds of reboots across Tuleta, Garrison and Habanero. Currently, we've hidden it behind a NVRAM config option, which *is* liable to change in the future (to ensure that only those who know what they're doing enable it) You can enable the experimental support via nvram option: nvram -p ibm,skiboot --update-config experimental-fast-reset=feeling-lucky Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: hide behind nvram option, include Mambo fixes from Mikey] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* SLW: Actually print the register dump only to memoryStewart Smith2016-09-171-1/+1
| | | | | | Fixes: 81154ba9b2d418cd5f9eda3a6f89ca6631556510 Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: improve error message for SLW timer stuckStewart Smith2016-09-141-3/+21
| | | | | | We still register dump, but only to in memory console buffer by default. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* interrupts: Rename icp_prep_for_rvwinkle to icp_prep_for_pmBenjamin Herrenschmidt2016-08-221-1/+1
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Move SPR setup calls away from assemblyBenjamin Herrenschmidt2016-08-221-0/+4
| | | | | | | | Move them to the C code so that rvwinkle_restore() is more generic and suitable for use for nap mode wakeup as well Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename rvwinkle patch to reset patch and install at bootBenjamin Herrenschmidt2016-08-221-9/+7
| | | | | | | | | | The patch code itself is unchanged (for now...). Install it during boot so we will be able to use power management instructions. We can't just have a proper exception code built at 0x100 as this is otherwise one of our entry points. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename enter_rvwinkle to enter_pm_stateBenjamin Herrenschmidt2016-08-221-4/+1
| | | | | | | And add an argument to specify whether to enter nap or rvwinkle Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: fix not indented if conditionStewart Smith2016-07-111-1/+1
| | | | | | | found by Smatch static analysis (http://smatch.sourceforge.net/): hw/slw.c:687 add_cpu_idle_state_properties() warn: if statement not indented Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: FWTS annotation suggestion for SLWRegisterDumpStewart Smith2016-06-301-4/+4
| | | | | Suggested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Fix typo in FWTS annotationStewart Smith2016-06-301-2/+2
| | | | | | | Update copyright header date at the same time Suggested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: add FWTS annotations for errorsStewart Smith2016-06-241-0/+13
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: use strncpy instead of strcpyShreyas B. Prabhu2016-06-201-1/+2
| | | | | | | | Use strncpy instead of strcpy while appending to name_buf. Suggested-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Allow adding idle states to power-mgt node in mamboShreyas B. Prabhu2016-06-201-6/+0
| | | | | | | | | | | | | | | | | | | This patch removes the check which prevents adding any idle state to "power-mgt" node in mambo. Power8 exposes 3 idle states- nap, fast-sleep and deep-winkle. While fast-sleep depends on SCOMs and deep-winkle depends on SCOMs/SLW, nap has no such dependencies and it can be enabled in mambo. Current code checks for "fast-sleep" in hostboot provided "ibm,enabled-idle-states" dt node for adding fast-sleep and checks for presence of SLW for adding winkle to "power-mgt". Hence with this change only nap will be added to "power-mgt" node in mambo on Power8. On Power9, this patch enables all idle states which don't need SLW. Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Move macros associated with power-mgt nodes to opal-api.hShreyas B. Prabhu2016-06-201-76/+56
| | | | | | | | | Move macros associated with cpuidle fields of power-mgt device tree nodes to opal-api.h This patch does not change any functionality. Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Add Power9 idle states to power-mgt dt nodeShreyas B. Prabhu2016-06-201-37/+149
| | | | | | | | | | | | | | | | | | | POWER ISA v3 defines a new idle processor core mechanism. In summary, a) new instruction named stop is added. This instruction replaces instructions like nap, sleep, rvwinkle. b) new per thread SPR named PSSCR is added which controls the behavior of stop instruction. This SPR subsumes PMICR. This patch adds the supported idle states to power-mgt dt node. It also introduces ibm,cpu-idle-state-psscr and ibm,cpu-idle-state-psscr-mask entries which exposes the value to be written to PSSCR to enter a given stop state. These entries replaces POWER8's counterparts ibm,cpu-idle-state-pmicr and ibm,cpu-idle-state-pmicr-mask. Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Remove unnecessary type casting castShreyas B. Prabhu2016-06-201-6/+6
| | | | | | Suggested-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Change variable name can_winkle to has_slwShreyas B. Prabhu2016-06-201-4/+5
| | | | | | | | | Change variable name "can_winkle" to a more generic name "has_slw". This makes it easier to add new deep-idle states which rely on SLW. Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Simplify if-condition while adding idle states to device treeShreyas B. Prabhu2016-06-201-30/+43
| | | | | | | | | | | if-condition in add_cpu_idle_state_properties which checks if a given idle state is supported is bloated with multiple '&' and '||' operations. Simplify by adding a mask variable and setting the relevant bits. This patch does not change any functionality. Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Remove overwrites for EX_PM_CORE_ECO_VRET and EX_PM_CORE_PFET_VRETShreyas B. Prabhu2015-11-171-17/+0
| | | | | | | | Remove code where we overwrite EX_PM_CORE_ECO_VRET and EX_PM_CORE_PFET_VRET since they are being initialized in hostboot code. Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: don't be tricky with pointer mathStewart Smith2015-11-171-3/+5
| | | | | | | | Mainly because this trips up some static analysis on resource usage and instead of having someone go back and prove it, add an assert and keep around a (no doubt optimized out) variable. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* sparse: fix warning constant is so big it is long in hw/slw.cStewart Smith2015-11-101-6/+6
| | | | | | | hw/slw.c:485:26: warning: constant 0x0000002000000000 is so big it is long hw/slw.c:486:31: warning: constant 0x0000003000000000 is so big it is long Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Move add_cpu_idle_state_properties() to add_opal_node()Shilpasri G Bhat2015-10-301-3/+1
| | | | | | | | | | | | | 05f52a8dd7c7e402896e049fd24f83d56b70aff4 core: Setup the OPAL DT node before platform probe add_cpu_idle_state_properties() was made local to slw.c in the above commit which caused p7 systems to not populate the nap idle state in DT. So moving add_cpu_idle_state_properties() to add_opal_node to fix this bug. Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw/timer: SBE based timer supportBenjamin Herrenschmidt2015-09-111-15/+168
| | | | | | | | | | | | | Recent HostBoot & SBE firmware provide a HW timer facility that can be used to implement OPAL timers and thus limit the reliance on the Linux heartbeat. This implements support for it. The side effect is that i2c from Centaurs is now usable. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: fix run-timer unit test] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Fix scan-build waring of never read rc valueStewart Smith2015-08-311-0/+4
| | | | | | Just log an error if we fail to re-read GP0. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* errorlog: Deprecate elog callback parameterSamuel Mendoza-Jonas2015-07-311-4/+4
| | | | | | | | | | There are now no users of the call_out parameter and future users should use the log_append_msg() and log_append_data() functions, so remove all references to call_out. Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fixup warnings when building with PORE=0Stewart Smith2015-07-021-7/+15
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add a couple more missing Naples referencesBenjamin Herrenschmidt2015-05-131-1/+2
| | | | | | | | The i2c and SLW code are testing for P8 chips by chip type and missing Naples. Fix this. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add global CPU job queueStewart Smith2015-05-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | When we have multiple systems trying to start concurrent jobs on different CPUs, they typically pick the first available (operating) CPU to schedule the job on. This works fine when there's only one set of jobs or when we want to bind jobs to specific CPUs. When we have jobs such as asynchronously loading LIDs and scanning PHBs, we don't care which CPUs they run on, we care more that they are not scheduled on CPUs that have existing tasks. This patch adds a global queue of jobs which secondary CPUs will look at for work (if idle). This leads to simplified callers, which just need to queue jobs to NULL (no specific CPU) and then call a magic function that will run the CPU job queue if we don't have secondary CPUs. Additionally, we add a const char *name to cpu_job just to aid with debugging. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Replace is_mambo_chip with a better chip quirk mechanismBenjamin Herrenschmidt2015-02-181-1/+1
| | | | | | | And add some basic qemu quirks Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Move flags for PM states to opal.h, exposing defines to OSStewart Smith2015-02-091-14/+10
| | | | | | | | | In Linux, we had OPAL_PM_(NAP|SLEEP|WINKLE)_ENABLED defines, this makes sense from an API PoV as having defines for flags in DT is useful, but we should clearly define what these flags are. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpu: Handle opal_reinit_cpus() more gracefully on P7Benjamin Herrenschmidt2015-02-091-0/+3
| | | | | | | Don't try to call into slw_reinit() which causes error logs to be generated. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Move skiboot internal things from opal.h to opal-api.hStewart Smith2015-02-061-0/+1
| | | | | | | | | | This is probably not the best collection of things in the world, but it means that opal.h is much closer to being directly usable by an OS. This triggers a bunch of #include fixes throughout the tree. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Update comment about winkle residencyStewart Smith2015-01-281-2/+7
| | | | | | We're currently providing an educated guess, which is 1second. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* cpuidle: Add validated metrics for idle statesPreeti U Murthy2015-01-281-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | The idle states are characterized by latency and residency numbers which determine the breakeven point for entry into them. The latency is a measure of the exit overhead from the idle state and residency is the minimum amount of time that a CPU must be predicted to be idle so as to reap the powersavings from entering into that idle state. These numbers are made use of by the cpuidle governors in the kernel to arrive at the appropriate idle state that a CPU must enter into when there is no work to be done. Today the kernel uses the latency numbers given by the firmware. To arrive at a value for residency, it uses a multiplier of 10 on the latency number. The latency number coded in the firmware is inaccurate as is the technique for calculating the residency. This patch codes in the the measured latency numbers for the idle states. The residency numbers have been arrived at experimentally after ensuring that the performance of latency sensitive workloads do not regress while allowing deeper idle states to be entered into during low load situations. The kernel is expected to use these values for optimal power efficiency. Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/hostservices.c and core/slw.c: cleanup log messagesCédric Le Goater2014-12-031-2/+2
| | | | | | | | printing timebase is redundant, prlog does that for us. Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* elog: Clean up error logging headersAlistair Popple2014-12-021-1/+1
| | | | | | | | | | | | | | | Commit cf6f4e8912d29fb89ce85c84834607065ad595a5 introduced a platform independent frontend for error logging. However it failed to move the generic parts of the fsp-elog.h header into the platform independent one, instead relying on the fact that up until now fsp-elog.h was included whenever a function needed to log errors. This patch moves the platform independent defines into the frontend header file (errorlog.h) and removes the include of the platform specific header in generic code paths. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add tweaks to work in Mambo simulatorBenjamin Herrenschmidt2014-12-011-0/+6
| | | | | | | | | | | Mambo doesn't implement various things such as PBA SCOMs, LPC, ChipTOD, etc... It also provides a special console hook. This adds detection of Mambo via the /mambo node, and enables us to boot all the way to Linux. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Quieten SLW log messages, mostly to PR_DEBUG. Some elevated to PR_ERR/WARNStewart Smith2014-10-151-20/+34
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Merge branch 'release-2.1.1'Benjamin Herrenschmidt2014-10-081-4/+0
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| * slw: Remove log flooding from fast sleep codeBenjamin Herrenschmidt2014-10-081-4/+0
| | | | | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Convert hw/slw.c from DBG #define to prlogStewart Smith2014-10-081-20/+21
| | | | | | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | occ/slw: Fix OCC/SLW initialization for power managementPreeti U Murthy2014-10-011-56/+17
|/ | | | | | | | | | | | | | | | | | | | | | When the fast/deep power management modes for the cpu idle states is initialized, bits which are not relevant in this context are also being set. Fix this. Besides this, the EX_PM_GP1 register will be read/written into by the OCC as well. We touch this register during initialization of fast/deep cpuidle modes and during initialization of pstate transitions. The register contents can thus get messed up due to potential race conditions between the OCC and sapphire settings. Hence make use of the AND and OR scoms to do the settings and hence let the hardware take care of the necessary synchronization. We can also get rid of the setting of deep mode during slw_reinit since we enable the required deep winkle mode during slw_init itself. This means effectively removing the slw_prepare_chip() and its children functions. They are no longer useful. Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* core: Setup the OPAL DT node before platform probeBenjamin Herrenschmidt2014-09-011-1/+3
| | | | | | | | | The platform probe code might want to add things to it. While at it, make add_cpu_idle_state_properties() local to slw.c and call it from slw_init() instead of from add_opal_node(). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* slw: Parse DT from host-boot for fast-sleep stringVaidyanathan Srinivasan2014-08-181-1/+1
| | | | | | | Match the fast-sleep name between OPAL and HB Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jeremy.kerr@au.ibm.com>
* slw: Extend opal_slw_set_reg to all supported sprsShreyas B. Prabhu2014-08-011-17/+26
| | | | | | | | | Commit 95932150: "slw: patch hsprg0 for wakeup from winkle" added OPAL call for HSPRG0 to be patched via slw. Extend it to all the sprs supported in libpore. Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* idle: Make idle flags endian safePreeti U Murthy2014-08-011-3/+4
| | | | | | | | | | | | | | | | | | The idle flag IDLE_LOSE_HYP_CONTEXT can be wrongly interpreted for IDLE_USE_INST_SLEEP if the kernel has endian bug, which would incorrectly enable fastsleep even though the device tree does not advertise it. Unfortunately, some kernels currently do have such a bug. Additionally, current fastsleep wakeup path makes opal calls to sync timebase which is not endian safe. This can lead to checkstops. Hence for now change the bits used in IDLE_LOSE_HYP_CONTEXT to avoid misinterpretation with IDLE_USE_INST_SLEEP in LE kernels. Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* slw: Don't enable fast sleep on Venice DD1.x even if HB says it's thereBenjamin Herrenschmidt2014-07-311-3/+4
| | | | | | It's broken on all DD1.x chips. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* slw: Fix indication of whether sleep is supportedBenjamin Herrenschmidt2014-07-301-4/+9
| | | | | | | | Don't enable it if HB doesn't allow it and fix backward logic in the code that was supposed to disable it. Also print out more diagnostic info. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* slw: Small cleanup of state definitionsBenjamin Herrenschmidt2014-07-301-6/+1
| | | | | | | | | Don't bother writing 0*constant for the non-relevant instruction bits in the various states and keep the "normal" sleep case in add_cpu_idle_state_properties() so we don't have to add it back later when we have a CPU that doesn't require the workaround. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* slw: patch hsprg0 for wakeup from winkleVaidyanathan Srinivasan2014-07-301-0/+33
| | | | | | | | | | | | Entering winkle results in hypervisor state loss. We can use PORE to restore hypervisor registers. This opal call adds support for that. This patch adds support for restoring HSPRG0. It can be extended to restore other SPRs. Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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