| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The NPU2{DBG,INF,ERR} macros use "NPU%d" as a prefix to identify messages
relating to a particular NPU.
It's slightly confusing to have per-NPU messages prefixed with "NPU0" or
"NPU1" and NPU-generic messages prefixed with "NPU2". On some future system
we could potentially have a NPU #2 in which case it'd be really confusing.
Use NPU rather than NPU2 for NPU-generic log messages. There's no risk of
confusion with the original npu.c code since that's only for P8.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
| |
Processor FRU vpd doesn't contain vendor detail. We have to parse
module VPD to get vendor detail.
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
On OpenPower system, VPD keyword size tells us the maximum size of the data.
But they fill trailing end with space (0x20) instead of NULL. Also spec
doesn't stop user to have space (0x20) within actual data.
This patch discards trailing spaces before populating device tree.
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
[stewart: fixup make check]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
| |
We need to use QEMU_BIN rather than QEMU as the makefiles define
QEMU already.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
This is based off the current development version of Qemu, and
importantly it contains the patch that allows skiboot and Linux to clear
the PCR that we require to boot.
Signed-off-by: Joel Stanley <joel@jms.id.au>
[stewart: use the open-power/qemu.git tree for prosterity]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
| |
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
| |
P8 boxes can opt in for mbox pnor support if they set the scratch
register bit to indicate it is supported.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
ASPEED BMCs use SIO register 0x29 to configure host firmwrae settings.
This documents those setings as currently used by Hostboot in [1].
Despite the naming, these settings are relevant for ast2500 systems as
well.
[1] src/usr/initservice/bootconfig/bootconfig_ast2400.H
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It looks like this code intended to read PSIHB SEMR, mask out some of
the values, and write it back. Instead it writes the mask to the
register.
Found using scan-build.
Fixes: 39addc6a0f1f ("PSI: Reorganize PSI link down handling code")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
Whatever this was used for appears to pre-date the public release of
skiboot.
Found using scan-build.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
In db9c1422002c ("Improve cpu_idle when PM is disabled") the
time_wait_poll calculation was modified to calculate the remaining time
on each loop. Because of this we don't need to decrement remaining any
more.
Found by scan-build.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When adding the sensors in occ_sensors_init, if the type is not
OCC_SENSOR_LOC_CORE, then the loop to find 'c' will not be executed.
Then c->pir is used for both of the the add_sensor_node calls below.
This provides a default value of 0 instead.
Found using scan-build.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
| |
It's only used there, let's minimise our needed includes.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
| |
We only touch it in limited places, let's simplify skiboot.h
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
| |
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
If FSP changes next IPL side, then disable fast reboot.
sample output:
[ 620.196442259,5] FSP: Got sysparam update, param ID 0xf0000007
[ 620.196444501,5] CUPD: FW IPL side changed. Disable fast reboot
[ 620.196445389,5] CUPD: Next IPL side : perm
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
| |
This effectively fences GPU RAM on GPU reset so the host system
does not have to crash every time we stop a KVM guest with a GPU
passed through.
Suggested-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To access the PNOR, OPAL/skiboot drives the BMC SPI controller using
the iLPC2AHB device of the BMC SuperIO controller and accesses the
flash contents using the LPC FW address space on which the PNOR is
remapped.
The QEMU PowerNV machine now integrates such models (SuperIO
controller, iLPC2AHB device) and also a pseudo Aspeed SoC AHB memory
space populated with the SPI controller registers (same model as for
ARM). The AHB window giving access to the contents of the BMC SPI
controller flash modules is mapped on the LPC FW address space.
The change should be compatible for machine without PNOR support.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Patch adds a simple python library module for xscom access.
It directly manipulate the '/access' file for scom read
and write from debugfs 'scom' directory.
Example on how to generate a getscom using this module:
#!/usr/bin/python
from adu_scoms import *
getscom = GetSCom()
getscom.parse_args()
getscom.run_command()
Sample output for above getscom.py:
# ./getscom.py -l
Chip ID | Rev | Chip type
---------|-------|-----------
00000008 | DD2.0 | P9 (Nimbus) processor
00000000 | DD2.0 | P9 (Nimbus) processor
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
| |
Suggested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
| |
Suggested-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Yeah-boiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiied-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
| |
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Acked-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
If the bus is found in error state when starting a new request, the
engine is reset and we enter recovery. However, once complete, the
reset operation shows a status of complete in the status register. So
any badly-timed called to check_status() will think the current top
request is complete, even though it hasn't run yet.
So don't update any request status while we are in recovery, as
nothing useful for the request is supposed to happen in that state.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The read offset (4:11) in Receive FIFO control register is incremented
by FIFO size whenever CRB read by NX. But the index in RxFIFO has to
match with the corresponding entry in FIFO maintained by VAS in kernel.
VAS entry is reset to 0 when opening the receive window during driver
initialization. So when NX842 is reloaded or in kexec boot, possibility
of mismatch between RxFIFO control register and VAS entries in kernel.
It could cause CRB failure / timeout from NX.
This patch adds nx_coproc_init opal call for kernel to initialize
readOffset (4:11) and Queued (15:23) in RxFIFO control register.
Fixes: 3b3c5962f432 ("NX: Add P9 NX support for 842 compression engine")
CC: stable # v5.8+
Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We've been reliably training the opencapi link on the first attempt
for quite a while. Furthermore, if it doesn't train on the first
attempt, retries haven't been that useful. So let's reduce the number
of attempts we do to train the link.
2 retries = 3 attempts to train.
Each (failed) training sequence costs about 3 seconds.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
Ensure that quirks are run (or not) for given PCI vendor and device IDs.
This tests the quirk infrastructure and the PCI_VENDOR_ID() and
PCI_DEVICE_ID() macros, the latter of which was recently found to be
broken.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
The vendor ID is 16 bits not 8. This error leaves the top of the vendor
ID in the bottom bits of the device ID, which resulted in e.g. a failure
to run the PCI quirk for the AST VGA device.
Fixes: 2b841bf0ef1b ("core/pci: Use cached vendor/device IDs in quirks")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
| |
We print out a whole bunch of things on boot, most of which aren't
interesting, so we should *not* print them instead.
Printing things like what CPUs we found and what PCI devices we found
*are* useful, so continue to do that. But we don't need to splat out
a bunch of things that are always going to be true.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
| |
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
HMIs for NPU xstops are broadcasted to all chips. All cores on all the
chips receive HMI. HMI handler correctly identifies and extracts the
NPU FIR details from affected chip, but while printing FIR data it
prints chip id and location code details of this_cpu()->chip_id which
may not be correct. This patch fixes this issue.
CC: stable # v6.0+
Fixes: 7bcbc78c ("Add location code to NPU2 HMI logging")
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
[stewart: add fixes and cc stable]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Watchdog resets can return an error code from the BMC indicating that
the BMC watchdog was not initialized. Currently we abort skiboot due to
a missing error handler. This patch implements handling
re-initialization for the watchdog, automatically saving the last
watchdog set values and re-issuing them if needed.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
| |
This does not create any behavioral change yet, but this will be useful
in a future commit that adds support for re-initializing the watchdog.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
This makes no functional changes, just refactors the completion function
to be used for reset only, since it does nothing but free the message
for set calls. This will be useful for future changes to reduce nesting
depth.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
Otherwise it is possible for the reset timer to elapse and trigger the
watchdog to wake back up. This doesn't affect the behavior of the
system since we are providing a NONE action to the BMC. However we would
like to avoid the action from taking place if possible.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
| |
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
| |
This makes it easier for future changes to ensure that the watchdog
stops ticking and doesn't requeue itself for execution in the
background. This way it is safe for resets to be performed after the
ticks are assumed to be stopped and it won't start the timer again.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
The op-build linux kernel has been configured to support the ipmi
watchdog. This driver will always handle the watchdog by either leaving
it enabled if configured, or by disabling it during module load if no
configuration is provided. This increases the coverage of the watchdog
during the boot process. The watchdog should no longer be disabled at
any point during skiboot execution.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
There is no clarification for why this change was needed, but presumably
this is due to a buggy BMC implementation where the Watchdog Set command
was processed concurrently or after the initial Watchdog Reset. This
inversion would cause the watchdog to stop since the DONT_STOP bit was
not set. Since we are now using the DONT_STOP bit during initialization,
the watchdog should not be stopped even if an inversion occurs.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The IPMI standard supports setting a DONT_STOP bit during an Watchdog
Set operation. Most of the time we don't want to stop the Watchdog when
updating the settings so we should be using this bit. This patch makes
it possible for callers of set_wdt to prevent the watchdog from being
stopped. This only changes the behavior of the watchdog during the
initial settings update when initializing skiboot. The watchdog is no
longer disabled and then immediately re-enabled.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
| |
The IPMI specification denotes that action 0x1 is Host Reset and 0x3 is
Host Power Cycle. Use the correct name for Reset in our watchdog code.
Signed-off-by: William A. Kennington III <wak@google.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Add '--allow-empty' which allows the filename for a given partition to
be blank. If set ffspart will set that part of the PNOR file 'blank' and
set ECC bits if required.
Without this option behaviour is unchanged and ffspart will return an
error if it can not find the partition file.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
pflash uses lowercase prefix when running make install in it's
direcetory, but uppercase PREFIX when running it in shared. Use
lowercase everywhere.
With this the OpenBMC bitbake recipie can drop an out of tree patch it's
been carrying for years.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The PHB callback 'get_link_state' is always reporting the link width,
irrespective of the link status and even when the link is down. It is
causing too much work (and failures) when the PHB is probed during pci
init.
The fix is to look at the link status first and report the link as
down when appropriate.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Now that links may train in parallel, traces shown during training can
be all mixed up. So add a prefix to all the traces to clearly identify
the chip and link the trace refers to:
OCAPI[<chip id>:<link id>]: this is a very useful message
The lower-level hardware procedures (npu2-hw-procedures.c) also print
traces which would need work. But that code is being reworked to be
better integrated with opencapi and nvidia, so leave it alone for now.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Reorder our link training steps so that they are executed on
fundamental reset instead of during the initial setup. Skiboot always
call a fundamental reset on all the PHBs during pci init.
It is done through a state machine, similarly to what is done for
'real' PHBs.
This is the first step for a longer term goal to be able to trigger an
adapter reset from linux. We'll need the reset callbacks of the PHB to
be defined. We have to handle the various delays differently, since a
linux thread shouldn't stay stuck waiting in opal for too long.
No functional changes.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Rework a bit the code to reset the opencapi adapter:
- make clearer which i2c pin is resetting which device
- break the reset operation in smaller chunks. This is really to
prepare for a future patch.
No functional changes.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Presence detection is not part of the opencapi specification. So each
platform may choose to implement it the way it wants.
All current platforms implement it through an i2c device where we can
query a pin to know if a device is connected or not. ZZ and Zaius have
a similar design and even use the same i2c information and pin
numbers.
However, presence detection on older ZZ planar (older than v4) doesn't
work, so we don't activate it for now, until our lab systems are
upgraded and it's better tested.
Presence detection on witherspoon is still being worked on. It's
shaping up to be quite different, so we may have to revisit the topic
in a later patch.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently there is no documentation for function #86, aka
OPAL_CHECK_ASYNC_COMPLETION, which is used on both Linux and FreeBSD,
but not documented yet.
This patch simply adds an initial entry for this function on
OPAL documentation.
Signed-off-by: Breno Leitao <leitao@debian.org>
[stewart: clean up some formatting/details]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
| |
It's been EOL since April 2017 (now 13 months ago).
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|
|
|
|
|
|
|
|
| |
3d019581c98153 introduced clearing PCR on reinit cpus,
and until (the near future from now) qemu didn't support
this register.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
|