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* hdata: Make sure reserved node name starts with "ibm, "Vasant Hegde2018-09-131-2/+9
| | | | | | | | | | | HDAT does not provide consistent label format for reserved memory label. Few starts with "ibm," while few other starts with component name. Lets make sure all the reserved node name starts with "ibm,". Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hdata: Cleanup get_hb_reserved_memVasant Hegde2018-09-132-10/+7
| | | | | | | | | - Use macro for label size - Replace malloc with array Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fsp/surv: Improve log messageVasant Hegde2018-09-131-2/+4
| | | | | Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hdata: Make sure FW feature name is not emptyVasant Hegde2018-09-131-0/+5
| | | | | | CC: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hdata: Fix dtc warningsVasant Hegde2018-09-131-1/+3
| | | | | | | | | | | | | | | Fix dtc warnings related to mcbist node. Warning (reg_format): "reg" property in /xscom@623fc00000000/mcbist@1 has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Warning (reg_format): "reg" property in /xscom@623fc00000000/mcbist@2 has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Warning (reg_format): "reg" property in /xscom@603fc00000000/mcbist@1 has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Warning (reg_format): "reg" property in /xscom@603fc00000000/mcbist@2 has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Ideally we should add proper xscom range here... but we are not getting that information in HDAT today. Lets fix warning until we get proper data in HDAT. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/cpu: Fix memory allocation for job arrayVaidyanathan Srinivasan2018-09-131-2/+2
| | | | | | | | | | | | | | | fixes: 7a3f307e core/cpu: parallelise global CPU register setting jobs This bug would result in boot-hang on some configurations due to cpu_wait_job() endlessly waiting for the last bogus jobs[cpu->pir] pointer. Reported-by: Stephanie Swanson <swanman@us.ibm.com> Reported-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Use $() rather than backticks in all shellStewart Smith2018-09-1317-51/+51
| | | | | | | | | | | The cool kids are all using $() these days as backticks are all backwards and uncool. Practically speaking, it makes it easier to escape things, nest things, and all the other reasons listed on http://mywiki.wooledge.org/BashFAQ/082 Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Qemu: don't print PR_WARNING on qemu defining rtc/uartStewart Smith2018-09-131-2/+2
| | | | | | | This helps us boot more warning/error free on qemu Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Don't probe a PHB if its gardedVaibhav Jain2018-09-131-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Presently phb4_probe_stack() causes an exception while trying to probe a PHB if its garded. This causes skiboot to go into a reboot loop with following exception log: *********************************************** Fatal MCE at 000000003006ecd4 .probe_phb4+0x570 CFAR : 00000000300b98a0 <snip> Aborting! CPU 0018 Backtrace: S: 0000000031cc37e0 R: 000000003001a51c ._abort+0x4c S: 0000000031cc3860 R: 0000000030028170 .exception_entry+0x180 S: 0000000031cc3a40 R: 0000000000001f10 * S: 0000000031cc3c20 R: 000000003006ecb0 .probe_phb4+0x54c S: 0000000031cc3e30 R: 0000000030014ca4 .main_cpu_entry+0x5b0 S: 0000000031cc3f00 R: 0000000030002700 boot_entry+0x1b8 This is caused as phb4_probe_stack() will ignore all xscom read/write errors to enable PHB Bars and then tries to perform an mmio to read PHB Version registers that cause the fatal MCE. We fix this by ignoring the PHB probe if the first xscom_write() to populate the PHB Bar register fails, which indicates that there is something wrong with the PHB. Cc: stable Fixes: dc21b4db3a2e('hw/phb4: Add initial support') Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Workaround PHB errata with CFG write UR/CA errorsBenjamin Herrenschmidt2018-09-131-1/+5
| | | | | | | | | | | | | If the PHB encounters a UR or CA status on a CFG write, it will incorrectly freeze the wrong PE. Instead of using the PE# specified in the CONFIG_ADDRESS register, it will use the PE# of whatever MMIO occurred last. Work around this disabling freeze on such errors Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-By: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Handle allocation errors in phb4_eeh_dump_regs()Benjamin Herrenschmidt2018-09-131-0/+4
| | | | | | | | If the zalloc fails (and it can be a rather large allocation), we will overwite memory at 0 instead of failing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Don't try to access non-existent PEST entriesBenjamin Herrenschmidt2018-09-131-3/+3
| | | | | | | | | | | | | In a POWER9 chip, some PHB4s have 256 PEs, some have 512. Currently, the diagnostics code retrieves 512 unconditionally, which is wrong and causes us to incorrectly report bogus values for the "high" PEs on the small PHBs. Use the actual number of implemented PEs instead Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* zaius: Add slots for the Barreleye G2 HDD rackOliver O'Halloran2018-09-131-1/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Barreleye G2 is distinct from the Zaius in that it features a 24 Bay NVMe/SATA HDD rack. To provide meaningful slot names for each NVMe device we need to define a slot table for the NVMe capable HDD bays. Unfortunately this isn't straightforward because the PCIe path to the NVMe devices isn't fixed. The PCIe topology is something like: P9 -> HBA card -> 9797 switch -> 20x NVMe HDD slots The 9797 switch is partitioned into two (or four) virtual switches which allow multiple HBA cards to be used (e.g. one per socket). As a result the exact BDFN of the ports will vary depending on how the system is configured. That said, the virtual switch configuration of the 9797 does not change the device and function numbers of the switch downports. This means that we can define a single slot table that maps switch ports to the NVMe bay names. Unfortunately we still need to guess which bus to use this table on, so we assume that any switch downport we find with the PEX9797 VDID is part of the 9797 that supports the HDD rack. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* astbmc/slot: Add _add_slot_info()Oliver O'Halloran2018-09-132-9/+18
| | | | | | | | | | | | Currently slot_table_get_slot_info() scans the platform defined slot table looking for a slot table entry that matches the device and adds the relevant information to the struct pci_device. This patch splits the searching and adding of the slot information into separate functions so that we can allow the platform code to use a different searching critera. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* astbmc/slots: Add SW_PLUGGABLE() macroOliver O'Halloran2018-09-131-0/+8
| | | | | | | | | Add a macro to help with defining ports that are under a switch. This is different to the existing ST_PLUGGABLE() macro in that it can be used to define a slot inside a slot_table_entry array. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* zaius: Add a slot tableOliver O'Halloran2018-09-131-0/+41
| | | | | | | A slot by any other name smells just as slot. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* skiboot 6.0.8 release notesStewart Smith2018-08-161-0/+67
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit eadd7d708d371f0f58b794f12cd868ead847cfab) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* cpu: Better output when waiting for a very long jobBenjamin Herrenschmidt2018-08-161-0/+5
| | | | | | | | | | Instead of printing at the end if the job took more than 1s, print in the loop every 30s along with a backtrace. This will give us some output if the job is deadlocked. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart: bump to 30s rather than 5s, preserve PR_DEBUG for >1s] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* lock: Fix interactions between lock dependency checker and stack checkerBenjamin Herrenschmidt2018-08-164-15/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | The lock dependency checker does a few nasty things that can cause re-entrancy deadlocks in conjunction with the stack checker or in fact other debug tests. A lot of it revolves around taking a new lock (dl_lock) as part of the locking process. This tries to fix it by making sure we do not hit the stack checker while holding dl_lock. We achieve that in part by directly using the low-level __try_lock and manually unlocking on the dl_lock, and making some functions "nomcount". In addition, we mark the dl_lock as being in the console path to avoid deadlocks with the UART driver. We move the enabling of the deadlock checker to a separate config option from DEBUG_LOCKS as well, in case we chose to disable it by default later on. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* lock: Move code aroundBenjamin Herrenschmidt2018-08-161-39/+39
| | | | | | | | This moves __try_lock() and lock_timeout() as a preparation for the next patch. No code change Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* lock: Increase con_suspend before __try_lockBenjamin Herrenschmidt2018-08-161-2/+4
| | | | | | | | | Otherwise, we might have the lock and hit prlog's inside __try_lock() in the list check (among others) in debug builds. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* i2c: Ensure ordering between i2c_request_send() and completionBenjamin Herrenschmidt2018-08-151-0/+3
| | | | | | | | | | | | | | i2c_request_send loops waiting for a flag "uc.done" set by the completion routine, and then look for a result code also set by that same completion. There is no synchronization, the completion can happen on another processor, so we need to order the stores to uc and the reads from uc so that uc.done is stored last and tested first using memory barriers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* i2c: Fix multiple-enqueue of the same request on NACKBenjamin Herrenschmidt2018-08-151-4/+3
| | | | | | | | | | i2c_request_send() will retry the request if the error is a NAK, however it forgets to clear the "ud.done" flag. It will thus loop again and try to re-enqueue the same request causing internal request list corruption. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Disable 32-bit MSI in capi modeFrederic Barrat2018-08-151-0/+9
| | | | | | | | | | | | | | | | | | | | If a capi device does a DMA write targeting an address lower than 4GB, it does so through a 32-bit operation, per the PCI spec. In capi mode, the first TVE entry is configured in bypass mode, so the address is valid. But with any (bad) luck, the address could be 0xFFFFxxxx, thus looking like a 32-bit MSI. We currently enable both 32-bit and 64-bit MSIs, so the PHB will interpret the DMA write as a MSI, which very likely results in an EEH (MSI with a bad payload size). We can fix it by disabling 32-bit MSI when switching the PHB to capi mode. Capi devices are 64-bit. Cc: stable Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* capp: Fix the capp recovery timeout comparisonVaibhav Jain2018-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | The current capp recovery timeout control loop in do_capp_recovery_scoms() uses a wrong comparison for return value of tb_compare(). This may cause do_capp_recovery_scoms() to report an timeout earlier than the 168ms stipulated time. The patch fixes this by updating the loop timeout control branch in do_capp_recovery_scoms() to use the correct enum tb_cmpval. Cc: Stable #6.0+ Fixes: 09b853cae0aa0("capi: Poll Err/Status register during CAPP recovery") Reported-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* don't fail fatally if qtrace can't be loadedStewart Smith2018-08-151-1/+3
| | | | | | | Helps with p9 public mambo on fedora at least Fixes: cb835dbdf8758b1fb0cae0ef2f93b324d1c4c96e Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4/capp: Update DMA read engines set in APC_FSM_READ_MASK based on link-widthVaibhav Jain2018-08-131-4/+18
| | | | | | | | | | | | | | | | | | | Commit 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based on link-width for PEC") update the CAPP init sequence by calculating the needed STQ/DMA-read engines based on link width and populating it in XPEC_NEST_CAPP_CNTL register. This however needs to be synchronized with the value set in CAPP APC FSM Read Machine Mask Register. Hence this patch update phb4_init_capp_regs() to calculate the link width of the stack on PEC2 and populate the same values as previously populated in PEC CAPP_CNTL register. Cc: stable # v5.7+ Fixes: 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based on link-width for PEC") Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal/hmi: Catch NPU2 HMIs for opencapiFrederic Barrat2018-08-131-5/+10
| | | | | | | | | HMIs for NPU2 are filtered with the 'compatible' string of the PHB, so add opencapi to the mix. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/chiptod: test QUIRK_NO_CHIPTOD in opal_resync_timebaseNicholas Piggin2018-08-131-0/+4
| | | | | | | | This allows some test coverage of deep stop states in Linux with Mambo. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* external/mambo: conditionally source qtrace scriptNicholas Piggin2018-08-132-7/+10
| | | | | | | | This automatically gives qtrace commads if the simulator provides the capability. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/cpu: Call memset with proper cpu_thread offsetVasant Hegde2018-08-131-1/+1
| | | | | | | | | | | | | | "cpu_thread *t + value" vs "(void *)t + val" Fixes: cfe9d441 (core/cpu: Prevent clobbering of stack guard for boot-cpu) CC: stable <skiboot@lists.ozlabs.org> # v6.0+ CC: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> CC: Nicholas Piggin <npiggin@gmail.com> CC: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Acked-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Vaibhav Jain<vaibhav@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* ast-io: Use bmc_sio_{get, put}() where requiredAndrew Jeffery2018-08-131-1/+7
| | | | | | | | | | | | | | | Booting the host with a particular BMC configuration could lead to the following error appearing in the OPAL msglog: [ 71.470748378,3] PLAT: AST IO initialisation failed! Wrap access to BMC_SIO_PLAT_FLAGS in bmc_sio_get()/bmc_sio_put() in order to unlock and relock the SuperIO controller as required and avoid the failure. Fixes: ebc8524a3a45 ("ast-io: Rework setup/tear-down of communication with the BMC") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Use the return value of phb4_fenced() in phb4_get_diag_data()Cyril Bur2018-08-061-2/+3
| | | | | | | | | | | | phb4_get_diag_data() checks the flags for the PHB4_AIB_FENCED after having called phb4_fenced(). This information is returned by phb4_fenced(). This patch was prompted by an unused return value warning in Coverity. Fixes: CID 163734 Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* doc/opal-api: Document npu2 relaxed ordering APIsReza Arbab2018-08-061-0/+67
| | | | | | | | | | Add documentation for these new OPAL APIs: #define OPAL_NPU_SET_RELAXED_ORDER 168 #define OPAL_NPU_GET_RELAXED_ORDER 169 Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* npu2: Add support for relaxed-ordering modeReza Arbab2018-08-065-6/+305
| | | | | | | | | | | | | | | | | | Some device drivers support out of order access to GPU memory. This does not affect the CPU view of memory but it does affect the GPU view of memory. It should only be enabled if the GPU driver has requested it. Add OPAL APIs allowing the driver to query relaxed ordering state or request it to be set for a device. Current hardware only allows relaxed ordering to be enabled per PCIe root port. So the code here doesn't enable relaxed ordering until it has been explicitly requested for every device on the port. Signed-off-by: Alistair Popple <alistair@popple.id.au> [arbab@linux.ibm.com: Rebase/refactor original changes] Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* npu2: Don't open code NPU2_RELAXED_ORDERING_CFG2Reza Arbab2018-08-062-18/+15
| | | | | | | | | Make the code that initializes these registers more descriptive by using macros instead of open coded literals. No functional change. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* npu2: Add NPU2_SM_REG_OFFSET()Reza Arbab2018-08-061-0/+4
| | | | | | | | | | | Add a register offset calculation macro using SM block index, similar to the other NPU2_*_REG_OFFSET() macros. Signed-off-by: Alistair Popple <alistair@popple.id.au> [arbab@linux.ibm.com: Rebase/refactor original changes] Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Track PEC index in dt and phb4 structReza Arbab2018-08-063-0/+4
| | | | | | | | | | | Knowing the PEC index is going to be important when we enable relaxed ordering, so store this value for later use. Signed-off-by: Alistair Popple <alistair@popple.id.au> [arbab@linux.ibm.com: Rebase/refactor original changes] Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* pci: Move logging macros to pci.hReza Arbab2018-08-062-21/+21
| | | | | | | | | Move the PCI{TRACE,DBG,NOTICE,ERR} logging macros from pci.c to pci.h so they can be used in other files. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2: Don't assert if we hit a mixed OpenCAPI/NVLink setupAndrew Donnellan2018-08-061-1/+1
| | | | | | | | | If our device tree contains a mix of OpenCAPI and NVLink links, that's a problem, but it's not fatal and we should simply abort NPU init rather than kill the machine - this is helpful for doing further debugging. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* skiboot 6.0.7 release notesStewart Smith2018-08-031-0/+20
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit d4c653149df1cdbd03477ce414e0c326c17da214) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/pci: Print 'PCI Summary' at PR_NOTICEOliver O'Halloran2018-08-021-1/+1
| | | | | | | | | | | The actual entries of the PCI Summary are printed at PR_NOTICE so that they go to the console during boot. The header however does not which breaks my patented "grep 'PCI Summary' -A 100" technique for scraping the summary out of a log file when that log is recorded from the SOL console. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* xive: Disable block trackerBenjamin Herrenschmidt2018-08-021-2/+4
| | | | | | | | | | Due to some HW errata, the block tracking facility (performance optimisation for large systems) should be disabled on Nimbus chips. Disable it unconditionally for now. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* docs/platforms: Add S812L and S822LJeremy Kerr2018-08-021-1/+3
| | | | | | | ... because the model names are similar to the S8x2LC. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* pci: Clarify power down logicOliver O'Halloran2018-08-011-2/+6
| | | | | | | | | | Currently pci_scan_bus() unconditionally calls pci_slot_set_power_state() when it's finished scanning a bus. This is one of those things that makes you go "WHAT?" when you first see it and frankly the skiboot PCI code could do with less of that. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/p8-i2c: Print the set error bitsOliver O'Halloran2018-08-011-0/+10
| | | | | | | | This is purely to save me from having to look it up every time someone gets an I2C error. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* mem_region: Merge similar allocations when dumpingOliver O'Halloran2018-08-011-7/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently we print one line for each allocation done at runtime when dumping the memory allocations. We do a few thousand allocations at boot so this can result in a huge amount of text being printed which is a) slow to print, and b) Can result in the log buffer overflowing which destroys otherwise useful information. This patch adds a de-duplication to this memory allocation dump by merging "similar" allocations (same location, same size) into one. Unfortunately, the algorithm used to do the de-duplication is quadratic, but considering we only dump the allocations in the event of a fatal error I think this is acceptable. I also did some benchmarking and found that on a ZZ it takes ~3ms to do a dump with 12k allocations. On a Zaius it's slightly longer at about ~10ms for 10k allocs. However, the difference there was due to the output being written to the UART. This patch also bumps the log level to PR_NOTICE. PR_INFO messages are suppressed at the default log level, which probably isn't something you want considering we only dump the allocations when we run out of skiboot heap space. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/phb4: Use local_alloc for phb4 structuresOliver O'Halloran2018-08-011-2/+6
| | | | | | | | | | | | | | | | Struct phb4 is fairly heavyweight at 283664 bytes. On systems with 6x PHBs per socket this results in using 3.2MB of heap space the PHB structures alone. This is a fairly large chunk of our 12MB heap and on systems with particularly large PCIe topologies, or additional PHBs we can fail to boot because we cannot allocate space for the FDT blob. This patch switches to using local_alloc() for the PHB structures so they don't consume too large a portion of our 12MB heap space. Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal-prd: Fix opal-prd crashVasant Hegde2018-08-011-3/+3
| | | | | | | | | | | | | | | | | | | | | Presently callback function from HBRT uses r11 to point to target function pointer. r12 is garbage. This works fine when we compile with "-no-pie" option (as we don't use r12 to calculate TOC). As per ABIv2 : "r12 : Function entry address at global entry point" With "-pie" compilation option, we have to set r12 to point to global function entry point. So that we can calculate TOC properly. Crash log without this patch: opal-prd[2864]: unhandled signal 11 at 0000000000029320 nip 00000 00102012830 lr 0000000102016890 code 1 Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> CC: Jeremy Kerr <jk@ozlabs.org> CC: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Acked-by: Jeremy Kerr <jk@ozlabs.org> Reviewed-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/phb4: Fix unused value/parameter warningsAndrew Donnellan2018-07-262-23/+27
| | | | | | | | Remove the phb4.c-specific CFLAGS that disable the unused value and unused parameter warnings, and cleanup the ensuing warnings. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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