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* phb4: Update & cleanup register definitionsBenjamin Herrenschmidt2018-11-081-22/+9
| | | | | | | | | | We had a bunch of remaining definitions for registers that don't actually exist in PHB4 anymore (copied from PHB3). This removes them along with a handful of minor style cleanups Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* skiboot 6.0.11 release notesStewart Smith2018-11-021-0/+57
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit 3e2024d903ee27ad77da01f454bb2404627ba5dc) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* CI: Bump the Qemu we build for CI testingStewart Smith2018-11-021-1/+1
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4/capp: Only reset FIR bits that cause capp machine checkVaibhav Jain2018-11-012-0/+18
| | | | | | | | | | | | | | | | | | During CAPP recovery do_capp_recovery_scoms() will reset the CAPP Fir register just after CAPP recovery is completed. This has an unintentional side effect of preventing PRD from analyzing and reporting this error. If PRD tries to read the CAPP FIR after opal has already reset it, then it logs a critical error complaining "No active error bits found". To prevent this from happening we update do_capp_recovery_scoms() to only reset fir bits that cause CAPP machine check (local xstop). This is done by reading the CAPP Fir Action0/1 & Mask registers and generating a mask which is then written on CAPP_FIR_CLEAR register. Cc: stable Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Check for RX errors after link trainingOliver O'Halloran2018-11-013-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | Some PHB4 PHYs can get stuck in a bad state where they are constantly retraining the link. This happens transparently to skiboot and Linux but will causes PCIe to be slow. Resetting the PHB4 clears the problem. We can detect this case by looking at the RX errors count where we check for link stability. This patch does this by modifying the link optimal code to check for RX errors. If errors are occurring we retrain the link irrespective of the chip rev or card. Normally when this problem occurs, the RX error count is maxed out at 255. When there is no problem, the count is 0. We chose 8 as the max rx errors value to give us some margin for a few errors. There is also a knob that can be used to set the error threshold for when we should retrain the link. ie nvram -p ibm,skiboot --update-config phb-rx-err-max=8 Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/flash: Log return code when ffs_init() failsAndrew Jeffery2018-11-011-1/+1
| | | | | | | | Knowing the return code is at least better than not knowing the return code. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash/ipmi-hiomap: Use error codes rather than abort()Andrew Jeffery2018-11-011-6/+10
| | | | | | | | | | Admittedly the situations are pretty dire, and usually indicate a programming failure on the BMC's part, but abort() seems a bit over the top. The technique was useful for development but shouldn't have made it into production. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash/ipmi-hiomap: Restore window state on window/protocol resetAndrew Jeffery2018-11-011-3/+39
| | | | | | | | | | | | | | | The initial implementation of ipmi-hiomap left a bit to be desired when it came to event handling: it didn't completely restore the state of the system to what it was before events like a hiomap protocol or window reset take place. The result is the host cannot recover from e.g. the BMC being rebooted underneath it. Take the only step required in the event of window reset, or the final step after performing the handshake in the event of a protocol reset, and re-open the previously active window if there was one. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash/ipmi-hiomap: Improve event handlingAndrew Jeffery2018-11-011-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The host firmware side of the hiomap protocol has two input sources: 1. Requests to adjust the flash mappings from itself or the kernel 2. State change events received from the BMC The handling of BMC state change events (2.) is asynchronous in two ways: a. The BMC pushes the state change event to the host, which is recorded but not acted on b. When handling requests to adjust the flash mapping, skiboot first addresses any new BMC state changes before servicing the mapping request Further, the hiomap protocol sends a mix of ackable and stateful events, where ackable events are only relevant until skiboot's hiomap event handler (b. above) cleans them up, whereas stateful events persist until the BMC provides a subsequent state change event. As we handle the ackable events asynchronous to receiving notification (b. vs a. above), OR in the received event state rather than directly assign to ensure we don't lose events that we must not miss. As an example, without the OR we may lose ackable events if the daemon restarts and pushes a new state change event during initialisation, which will necessarily bear no relation to the previous state change event value. Similarly, don't close active windows in a. based on the event content, as we need the window type information to handle state restoration in b. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Describe platform BMC register configurationAndrew Jeffery2018-11-011-1/+9
| | | | | | | | Provide the p9dsu-specific BMC configuration values required for the host kernel to drive the VGA display correctly. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Add HIOMAP-over-IPMI supportAndrew Jeffery2018-11-011-0/+1
| | | | | | | Boston uses the same netfn / command values as OpenBMC. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash/ipmi-hiomap: Cleanup allocation on init failureAndrew Jeffery2018-11-011-4/+12
| | | | | | | | | Previously we were leaking the memory pointed by ctx if an IPMI error occurred during protocol initialisation. Make sure we free the memory if an error occurs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* nx: Don't abort on missing NX when using a QEMU machineBenjamin Herrenschmidt2018-11-011-1/+2
| | | | | | | | | These don't have an NX node (and probably never will) as they don't provide any coprocessor. However, the DARN instruction works so this abort is unnecessary. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* skiboot v6.0.10 release notesStewart Smith2018-10-311-0/+81
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> (cherry picked from commit b93b22df1a8b8ace4ffc080b28877fde7eaa3dde) Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Run pollers in time_wait() when not bootingStewart Smith2018-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This only bit us hard with hiomap in one scenario. Our OPAL API has been OPAL_POLL_EVENTS may be needed to make forward progress on ongoing operations, and the internal to skiboot API has been that time_wait() of a suitable time will run pollers (on at least one CPU) to help ensure forward progress can be made. In a perfect world, interrupts are used but they may a) be disabled, or b) the thing we're doing can't use interrupts because computers are generally terrible. Back in 3db397ea5892a (circa 2015), we changed skiboot so that we'd run pollers only on the boot CPU, and not if we held any locks. This was to reduce the chance of programming code that could deadlock, as well as to ensure that we didn't just thrash all the cachelines for running pollers all over a large system during boot, or hard spin on the same locks on all secondary CPUs. The problem arises if the OS we're booting makes an OPAL call early on, with interrupts disabled, that requires a poller to run to make forward progress. An example of this would be OPAL_WRITE_NVRAM early in Linux boot (where Linux sets up the partitions it wants) - something that occurs iff we've had to reformat NVRAM this boot (i.e. first boot or corrupted NVRAM). The hiomap implementation should arguably *not* rely on synchronous IPMI messages, but this is a future improvement (as was for mbox before it). The mbox-flash code solved this problem by spinning on check_timers(). More generically though, the approach of running the pollers when no longer booting means we behave more in line with what the API is meant to be, rather than have this odd case of "time_wait() for a condition that could also be tripped by an interrupt works fine unless the OS is up and running but hasn't set interrupts up yet". Fixes: 529bdca0bc546a7ae3ecbd2c3134b7260072d8b0 Fixes: 3db397ea5892a8b348cf412739996731884561b3 Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hiomap: fix missing newline at end of 'Flushing writes' prlog()Stewart Smith2018-10-301-1/+1
| | | | | Fixes: 529bdca0bc546a7ae3ecbd2c3134b7260072d8b0 Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* travis/ci: rework Dockerfiles to produce build artifactsStewart Smith2018-10-2917-14/+17
| | | | | | | ubuntu-latest was also missing clang, as ubuntu-latest is closer to ubuntu 18.04 than 16.04 Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hiomap: free ipmi message in callbackStewart Smith2018-10-251-0/+3
| | | | | | | | Otherwise we'd slowly leak memory on each hiomap operation. Fixes: 529bdca0bc546a7ae3ecbd2c3134b7260072d8b0 Tested-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Revert "TEMPORARY HACK: Disable verifying VERSION"Stewart Smith2018-10-251-6/+1
| | | | | | This reverts commit f835684365273c5ff1b7c700ddc0f9c1a859363f. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Quieten 'warnings' now that SIO is disabledStewart Smith2018-10-252-3/+11
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* npu2-opencapi: Enable presence detection on ZZFrederic Barrat2018-10-254-14/+1
| | | | | | | | | | | | | | | | | | Presence detection for opencapi adapters was broken for ZZ planars v3 and below. All ZZ systems currently used in the lab have had their planar upgraded, so we can now remove the override we had to force presence and activate presence detection. Which should improve boot time. Considering the state of opal support on ZZ, this is really only for lab usage on BML. The opencapi enablement team has okay'd the change. In the unlikely case somebody tries opencapi on an old ZZ, the presence detection through i2c will show that no adapter is present and skiboot won't try to access or train the link. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* cpu: Quieten OS endian switch messagesJoel Stanley2018-10-251-2/+2
| | | | | | | | | | | | | | Users see these when loading an OS from Petitboot: [ 119.486794100,5] OPAL: Switch to big-endian OS [ 120.022302604,5] OPAL: Switch to little-endian OS Which is expected and doesn't provide any information the user can act on. Switch them to PR_INFO so they still appear in the log, but not on the serial console. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* pflash: Add --skip option for readingAdriana Kobylak2018-10-253-3/+29
| | | | | | | | | | | | Add a --skip=N option to pflash to skip N number of bytes when reading. This would allow users to print the VERSION partition without the STB header by specifying the --skip=4096 argument, and it's a more generic solution rather than making pflash depend on secure/trusted boot code. Signed-off-by: Adriana Kobylak <anoo@linux.ibm.com> Reviewed-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> [stewart: fix up pflash test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* external/mambo: Check for qtrace_utils.tcl before sourcing itMadhavan Srinivasan2018-10-231-1/+3
| | | | | | | | | | | Commit cb835dbdf875 ('external/mambo: conditionally source qtrace script') added qtrace_utils.tcl sourcing in skiboot.tcl without a check to see whether it exists in the current directory. This broke running mambo from another directory using skiboot.tcl. Patch adds a check. Fixes: cb835dbdf875 ('external/mambo: conditionally source qtrace script') Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/astbmc/vesnin: Send list of PCI devices to BMC through IPMIArtem Senichev2018-10-231-2/+101
| | | | | | | | | | | Implements sending a list of installed PCI devices through IPMI protocol. Each PCI device description is sent as a standalone IPMI message. A list of devices can be gathered from separate messages using the session identifier. The session Id is an incremental counter that is updated at the start of synchronization session. Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* lpc: Clear sync no-response field prior to device probeAndrew Jeffery2018-10-231-1/+6
| | | | | | | | | | | | | | | | | | | | | Artem Senichev reported[1] his P8 platform was failing to boot from a43e9a66aae9 ("astbmc: Fail SFC init if SIO is unavailable") with the following error: [ 110.097168975,3] PLAT: Failed to open PNOR flash controller I reproduced this behaviour on a Palmetto; we need to ensure the state of the no-response error bit is clear before proceding with the presence test. The fix appears to resolve the failure to open the PNOR flash controller on Palmetto and doesn't change the expected behaviour on Witherspoon. [1] https://github.com/open-power/skiboot/issues/197 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Tested-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/device: NULL pointer dereference fixNicholas Piggin2018-10-231-1/+4
| | | | | | | This was caught with unmapped memory dereference page faults. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/flash: NULL pointer dereference fixesNicholas Piggin2018-10-232-7/+14
| | | | | | | These were caught with unmapped memory dereference page faults. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* STOP API: Changes for SMF and SPR self savePrem Shanker Jha2018-10-236-114/+886
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit accomplishes following: - Implementation of new self restore region memory layout - Restore of SPRs pertaining to SMF - Self save of SPRs - Backward compatibility with old self restore layout Key_Cronus_Test=PM_REGRESS Change-Id: I11359e392102d32896251225907eb95a43ba6f78 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66212 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66216 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* SCOM Restore: Handle case of old HB and new STOP API case.Prem Shanker Jha2018-10-231-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit addresses a situation where STOP API is new and HB is old. It detects the siutation and retains legacy behavior. This situation can arise if PHYP tries to use SCOM restore changes of STOP API with older fipsdriver or OPAL does the same on older HB binaries. Key_Cronus_Test=PM_REGRESS Change-Id: Iaaa866169904a47e10c79ae4894d2eedccfafe53 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62610 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62614 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> [build fixes for OPAL : Akshay Adiga] Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* README: Update Qemu instructionsJoel Stanley2018-10-161-10/+15
| | | | | | | | Qemu has evolved since this text was written. We can now run skiboot on upstream Qemu. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hdata/i2c: Skip unknown device typeVasant Hegde2018-10-161-5/+7
| | | | | | | Do not add unknown I2C devices to device tree. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hdata/i2c: Make SPD workaround more workaroundyOliver O'Halloran2018-10-161-3/+8
| | | | | | | | | | | | | | | | | | We have a hack in the I2C device parser to fix up entries generated by hostboot for the DIMM SPD devices. For some reason they get reported as 128Kbit EEPROMs which is bad since those have a different I2C interface to an actual SPD device. Oddly enough, the FSP also gets this wrong in a slightly different way. In the FSP case they are reported as a at24c04 (4Kbit) EEPROM, which also has a different I2C interface. To fix both these problems for any eeprom we find on that bus to have the compatible string of "spd". Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hdata/i2c: Add whitelisting for Host I2C devicesOliver O'Halloran2018-10-161-31/+37
| | | | | | | | | | | | Many of the devices that we get information about through HDAT are for use by firmware rather than the host operating system. This patch adds a boolean flag to hdat_i2c_info structure that indicates whether devices with a given purpose should be reserved for use inside of OPAL (or some other firmware component, such as the OCC). Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* opal/hmi: Wakeup the cpu before reading core_firVaibhav Jain2018-10-161-6/+15
| | | | | | | | | | | | | | | | | | | | | When stop state 5 is enabled, reading the core_fir during an HMI can result in a xscom read error with xscom_read() returning an OPAL_XSCOM_PARTIAL_GOOD error code and core_fir value of all FFs. At present this return error code is not handled in decode_core_fir() hence the invalid core_fir value is sent to the kernel where it interprets it as a FATAL hmi causing a system check-stop. This can be prevented by forcing the core to wake-up using before reading the core_fir. Hence this patch wraps the call to read_core_fir() within calls to dctl_set_special_wakeup() and dctl_clear_special_wakeup(). Suggested-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com> Acked-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4: Enable PHB MMIO-0/1 Bars only when mmio window existsVaibhav Jain2018-10-161-2/+1
| | | | | | | | | | | | | Presently phb4_probe_stack() will always enable PHB MMIO0/1 windows even if they doesn't exist in phy_map. Hence we do some minor shuffling in the phb4_probe_stack() so that MMIO-0/1 Bars are only enabled if there corresponding MMIO window exists in the phy_map. In case phy_map for an mmio window is '0' we set the corresponding BAR register to '0'. Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4/capp: Update the expected Eye-catcher for CAPP ucode lidVaibhav Jain2018-10-162-3/+3
| | | | | | | | | | | | | | | | | | | | Currently on a FSP based P9 system load_capp_code() expects CAPP ucode lid header to have eye-catcher magic of 'CAPPPSLL'. However skiboot currently supports CAPP ucode only lids that have a eye-catcher magic of 'CAPPLIDH'. This prevents skiboot from loading the ucode with this error message: CAPP: ucode header invalid We fix this issue by updating load_capp_ucode() to use the eye-catcher value of 'CAPPLIDH' instead of 'CAPPPSLL'. Cc: stable Fixes: e50764d4f2b1("capi: Load capp microcode") Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* phb4/capp: Use link width to allocate STQ engines to CAPPVaibhav Jain2018-10-161-17/+29
| | | | | | | | | | | | | | | Update phb4_init_capp_regs() to allocates STQ Engines to CAPP/PEC2 based on link width instead of always assuming it to x8. Also re-factor the function slightly to evaluate the link-width only once and cache it so that it can also be used to allocate DMA read engines. Cc: stable Fixes: 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based on link-width for PEC") Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/flash: Ignore prefix when comparing versions.Samuel Mendoza-Jonas2018-10-161-2/+16
| | | | | | | | | The Skiboot version can include a "skiboot-" prefix if built with something like Buildroot. The property being compared against won't include this so ignore it. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/device: Test dt_new_check()Stewart Smith2018-10-161-2/+4
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/device: increase test coverage for dt_new_addr and dt_new_2addrStewart Smith2018-10-161-0/+2
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/device: add test for dt_new() a duplicate nodeStewart Smith2018-10-161-0/+1
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/device: Add test for duplicate nodes with dt_attach_root()Stewart Smith2018-10-161-1/+8
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* gcov: Fix building with GCC8Stewart Smith2018-10-162-7/+8
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Fail SFC init if SIO is unavailableAndrew Jeffery2018-10-111-0/+3
| | | | | | | | | If SuperIO is unavailable then the driver cannot perform accesses on which it currently depends. Test for SuperIO availability during initialsation and bail out immediately if it is absent. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platform: Restructure bmc_platform typeAndrew Jeffery2018-10-1119-49/+135
| | | | | | | | | | Segregate the BMC platform configuration into hardware and software components. This allows population of platform default values for hardware configuration that may no-longer be accessible by the host. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fixup pci-quirk unit test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Use LPC probe calls to determine SIO presenceAndrew Jeffery2018-10-111-20/+10
| | | | | | | | | Avoid the probabilistic approach and use a deterministic one instead. The probe calls use a slow, synchronous method to capture the the state of the target device, so it is used sparingly (only on first access). Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* lpc: Introduce generic probe capabilityAndrew Jeffery2018-10-112-58/+156
| | | | | | | | | | | | | | Introduce generic read and write probe functions that allow detection of valid addresses by way of synchronous testing for the SYNC no-response state. If the no-response state is detected the probe functions will return an error to the caller, who can do with it what they wish. In the process, rip out the naive mechanism for muting the equivalent asynchronous error logging (regretfully introduced recently by yours truly). Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Remove coordinated isolation supportAndrew Jeffery2018-10-113-99/+6
| | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Prefer ipmi-hiomap for PNOR accessAndrew Jeffery2018-10-116-19/+57
| | | | | | | | | If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fix up mbox test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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