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* gard: Fix up do_create return valuesOliver O'Halloran2017-12-011-4/+4
| | | | | | | | | | The return value of a subcommand is interpreted as a libflash error code when it's positive or some subcommand specific error when negative. Currently the create subcommand always returns zero when exiting (even for errors) so fix that. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Delete stale commentOliver O'Halloran2017-12-011-6/+0
| | | | | | | This comment referred to some previously deleted code. It can go. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Add usage message for -pOliver O'Halloran2017-12-011-0/+1
| | | | | | | | The -p argument only really makes sense when -f is specified. Print an actual error message rather than just the usage blob. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Fix max instance countOliver O'Halloran2017-12-011-2/+2
| | | | | | | | There's an entire byte for the instance count rather than a nibble. Only barf if the instance number is beyond 255 rather than 16. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Fix up path parsingOliver O'Halloran2017-12-011-1/+1
| | | | | | | | | | Currently we assume that the Unit ID can be used as an array index into the chip_units[] structure. There are holes in the ID space though, so this doesn't actually work. Fix it up by walking the array looking for the ID. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Set chip generation based on PVROliver O'Halloran2017-12-011-10/+42
| | | | | | | | | | | | | | | Currently we assume that this tool is being used on a P8 system by default and allow the user to override this behaviour using the -8 and -9 command line arguments. When running on the host we can use the PVR to guess what chip generation so do that. This also changes the default behaviour to assume that the host is a P9 when running on an ARM system. This tool didn't even work when compiled for ARM until recently and the OpenBMC vPNOR hack that we have currently is broken for P9 systems that don't use vPNOR (Zaius and Romulus). Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* gard: Allow records with an ID of 0xffffffffOliver O'Halloran2017-12-011-3/+4
| | | | | | | | | | We currently assume that a record with an ID of 0xffffffff is invalid. Apparently this is incorrect and we should display these records, so expand the check to compare the entire record with 0xff rather than just the ID. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* external/test: Print the name of each testOliver O'Halloran2017-12-011-0/+1
| | | | | | | | | Currently running 'make check' results in nothing but a message indicating that all tests passed. If a test runs in a wood and it doesn't make a sound, did it run at all? Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/occ: Log proper SCOM register namesPridhiviraj Paidipeddi2017-12-011-3/+3
| | | | | | | | This patch fixes the logging of incorrect SCOM register names. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* sensors: Fix dtc warning for new occ inband sensors.Pridhiviraj Paidipeddi2017-11-302-0/+4
| | | | | | | | | | | | | | | dtc complains about missing reg property when a DT node is having a unit name or address but no reg property. /ibm,opal/sensors/vrm-in@c00004 has a unit name, but no reg property /ibm,opal/sensors/gpu-in@c0001f has a unit name, but no reg property /ibm,opal/sensor-groups/occ-js@1c00040 has a unit name, but no reg property This patch fixes these warnings for new occ inband sensors and also for sensor-groups by adding necessary properties. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* sensors: Fix dtc warning for dts sensors.Pridhiviraj Paidipeddi2017-11-302-0/+4
| | | | | | | | | | | | | | | dtc complains about missing reg property when a DT node is having a unit name or address but no reg property. Example warning for core dts sensor: /ibm,opal/sensors/core-temp@5c has a unit name, but no reg property /ibm,opal/sensors/core-temp@804 has a unit name, but no reg property This patch fixes this by adding necessary properties. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> [stewart: use handle as register rather than chip id] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/occ: Fix psr cpu-to-gpu sensors node dtc warning.Pridhiviraj Paidipeddi2017-11-301-0/+3
| | | | | | | | | | | | | dtc complains about missing reg property when a DT node is having a unit name or address but no reg property. /ibm,opal/power-mgt/psr/cpu-to-gpu@0 has a unit name, but no reg property /ibm,opal/power-mgt/psr/cpu-to-gpu@100 has a unit name, but no reg property This patch fixes this by adding necessary properties. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mambo: Add support for NUMAMichael Ellerman2017-11-301-0/+25
| | | | | | | | | | | | | | Currently the mambo scripts can do multiple chips, but only the first ever has memory. This patch adds support for having memory on each chip, with each appearing as a separate NUMA node. Each node gets MEM_SIZE worth of memory. It's opt-in, via export MAMBO_NUMA=1. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/imc: alway enable "imc_nest_chip" exports propertyMadhavan Srinivasan2017-11-301-22/+39
| | | | | | | | | | | | | | | imc_dt_update_nest_node() adds a "imc_nest_chip" property to the "exports" node (under opal_node) to view nest counter region. This comes handy when debugging ucode runtime errors (like counter data update or control block update so on...). And current code enables the property only if the microcode is in running state at system boot. To aid the debug of ucode not running/starting issues at boot, enable the addition of "imc_nest_chip" property always. Fixes: 167e65d570a7c ('skiboot/hw/imc: Add nest_memory region to "exports" node') Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add documentation for ibm, firmware-versions device tree nodeStewart Smith2017-11-301-0/+139
| | | | | | | Reviewed-by: Reza Arbab <arbab@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Reviewed-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* NX: Print read xscom config failures.Pridhiviraj Paidipeddi2017-11-303-14/+51
| | | | | | | | | Currently in NX, only write xscom config failures are tracing. Add trace statements for read xscom config failures too. No functional changes. Signed-off-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvram: Fix 'missing' nvram on FSP systems.Cyril Bur2017-11-307-26/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | commit ba4d46fdd9eb ("console: Set log level from nvram") wants to read from NVRAM rather early. This works fine on BMC based systems as nvram_init() is actually synchronous. This is not true for FSP systems and it turns out that the query for the console log level simply queries blank nvram. The simple fix is to wait for the NVRAM read to complete before performing any query. Unfortunately it turns out that the fsp-nvram code does not inform the generic NVRAM layer when the read is complete, rather, it must be prompted to do so. This patch addresses both these problems. This patch adds a check before the first read of the NVRAM (for the console log level) that the read has completed. The fsp-nvram code has been updated to inform the generic layer as soon as the read completes. The old prompt to the fsp-nvram code has been removed but a check to ensure that the NVRAM has been loaded remains. It is conservative but if the NVRAM is not done loading before the host is booted it will not have an nvram device-tree node which means it won't be able to access the NVRAM at all, ever, even after the NVRAM has loaded. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/nx: Fix NX BAR assignmentsOliver O'Halloran2017-11-302-27/+46
| | | | | | | | | | | | | | | The NX rng BAR is used by each core to source random numbers for the DARN instruction. Currently we configure each core to use the NX rng of the chip that it exists on. Unfortunately, the NX can be deconfigured by hostboot and in this case we need to use the NX of a different chip. This patch moves the BAR assignments for the NX into the normal nx-rng init path. This lets us check if the normal (chip local) NX is active when configuring which NX a core should use so that we can fallback gracefully. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Change default GEN3 lane equalisation setting to 0x54Michael Neuling2017-11-301-2/+2
| | | | | | | | | | | | | | | | Currently our GEN3 lane equalisation settings are set to 0x77. Change this to 0x54. This change will allow us to train at GEN3 in a shorter time and more consistently. This setting gives us a TX preset 0x4 and RX hint 0x5. This gives a boost in gain for high frequency signaling. It allows the most optimal continuous time linear equalizers (CTLE) for the remote receiver port and de-emphasis and pre-shoot for the remote transmitter port. Machine Readable Workbooks (MRW) are moving to this new value also. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Init changesMichael Neuling2017-11-301-6/+6
| | | | | | | | | | | | | These init changes for phb4 from the HW team. Link down are now endpoint recoverable (ERC) rather than PHB fatal errors. BLIF Completion Timeout Error now generate an interrupt rather than causing freeze events. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* p9_stop_api: PM: Added support for version control in SCOM restore entries.Prem Shanker Jha2017-12-012-4/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | - adds version info in SCOM restore entry header - adds version specific details in SCOM restore entry header - retains old behavior of SGPE Hcode's base version Key_Cronus_Test=NO_TEST CQ:HW423686 HW-Image-Prereq: Ie1611b009e95192a0dad3a47af14ef8a36dd454b Change-Id: I43e7e067b59513db1c99ce913009a9a3ef5de90b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48856 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48859 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> (cherry picked from hostboot commit 47c3bbe42264514a25e00820cac1c8488aed9073) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* p9_stop_api: EQ SCOM Restore: Introduced version control in SCOM restore entry.Prem Shanker Jha2017-12-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | - introduces version control in header of SCOM restore entry - ensures backward compatibility - introduces flexibility to handle any number of SCOM restore entry. Key_Cronus_Test=NO_TEST CQ:HW423686 HW-Image-Prereq: Ie1611b009e95192a0dad3a47af14ef8a36dd454b Change-Id: I781b0862dc983001574ba5f09a84ea0a2f7f781f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48793 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48795 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> (cherry picked from hostboot commit 04846f139458c34b6b35824f2a63876fe75daf06) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mambo: split qtrace macros out into qtrace_utils.tclStewart Smith2017-11-292-11/+10
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* external/test: Display test dir on failureOliver O'Halloran2017-11-281-2/+6
| | | | | | | | | | Print some information about the failing test rather than forcing the user to go dig it up. Also move the stdout and stderr files into the test directory to make the relevant stdout/stderr files easier to locate. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Remove obsolete commentBenjamin Herrenschmidt2017-11-281-2/+0
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Don't bother cleaning up disabled EQs in resetBenjamin Herrenschmidt2017-11-281-4/+9
| | | | | | | | Additionally, warn if we find an enabled one that isn't one of the firmware built-in queues. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Warn on valid VPs found in abnormal casesBenjamin Herrenschmidt2017-11-281-1/+4
| | | | | | | | | | | If an allocated VP is left valid at xive_reset() or Linux tries to free a valid (enabled) VP block, print errors. The former happens occasionally if kdump'ing while KVM is running so keep it as a debug message. The latter is a programming error in Linux so use a an error log level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Properly reserve built-in VPs in non-group modeBenjamin Herrenschmidt2017-11-281-0/+2
| | | | | | | | | This is not normally used but if the #define is changed to disable block group mode we would incorrectly clear the buddy completely without marking the built-in VPs reserved. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Quieten debug messages in standard buildsBenjamin Herrenschmidt2017-11-281-18/+18
| | | | | | | | | | This makes a bunch of messages, especially the per-cpu ones, only enabled in debug builds. This avoids clogging up the OPAL logs with XIVE related messages that have proven not being particularily useful for field defects. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Implement "single escalation" featureBenjamin Herrenschmidt2017-11-283-28/+207
| | | | | | | | | | | | | | | | | | | | | | | | | This adds a new VP flag to control the new DD2.0 "single escalation" feature. This feature allows us to have a single escalation interrupt per VP instead of one per queue. It works by hijacking queue 7 (which is this no longer usable when that is enabled) and exploiting two new hardware bits that will: - Make the normal queues (0..6) escalate unconditionally thus ignoring the ESe bits. - Route the above escalations to queue 7 - Have queue 7 silently escalate without notification Thus the escalation of queue 7 becomes the one escalation interrupt for all the other queues. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: When disabling a VP, wipe all of its settingsBenjamin Herrenschmidt2017-11-282-5/+7
| | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Improve cleaning up of EQsBenjamin Herrenschmidt2017-11-281-11/+34
| | | | | | | | | Factors out the function that sets an EQ back to a clean state and add a cleaning pass for queue left enabled when freeing a block of VPs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: When disabling an EQ, wipe all of its settingsBenjamin Herrenschmidt2017-11-282-53/+58
| | | | | | | This avoids having configuration bits left over Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Define API for single-escalation VP modeBenjamin Herrenschmidt2017-11-282-1/+22
| | | | | | | | | | | This mode allows all queues of a VP to use the same escalation interrupt, at the cost of losing priority 7. This adds the definition and documentation of the API, the implementation will come next. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* occ-sensors: Fix up quad/gpu location mixupOliver O'Halloran2017-11-281-2/+7
| | | | | | | | | The GPU and QUAD sensor location types are swapped compared to what exists in the OCC code base which is authoritive. Fix them up. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fsp-elog: Reduce verbosity of elog messagesMichael Neuling2017-11-281-2/+2
| | | | | | | | | | | | These messages just fill up the opal console log with useless messages resulting in us losing useful information. They have been like this since the first commit in skiboot. Make them trace. Signed-off-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* lpc: Clear pending IRQs at bootOliver O'Halloran2017-11-281-0/+4
| | | | | | | | | | | | | | | When we come in from hostboot the LPC master has the bus reset indicator set. This error isn't handled until the host kernel unmasks interrupts, at which point we get the following suprious error: [ 20.053560375,3] LPC: Got LPC reset on chip 0x0 ! [ 20.053564560,3] LPC[000]: Unknown LPC error Error address reg: 0x00000000 Fix this by clearing the various error bits in the LPC status register before we initalise the skiboot LPC bus driver. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* external/mambo: Switch qtrace command to use pluginsNicholas Piggin2017-11-281-26/+7
| | | | | | | | | The plugin seems to be the preferred way to do this now, it works better, and the qtracer emitter seems to generate invalid traces in new mambo versions. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* skiboot 5.9.4 release notesStewart Smith2017-11-291-0/+26
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> (cherry picked from commit 1a1a2bd43829dc49c63fda07c569fbfcb73353a5) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* npu2: hw-procedures: Change phy_rx_clock_sel valuesReza Arbab2017-11-281-4/+4
| | | | | | | | | | | | | | | | | | | | | | | The clock selection bits we set here are inputs to a state machine. DL clock select (bits 30-31) 0b00: lane 0 clock 0b01: lane 7 clock 0b10: grid clock 0b11: invalid/noop To recover from a potential glitch, we need to ensure that the value we set forces a state change. Our current sequence is to set 0x3 followed by 0x1. With the above now known, that is actually a noop followed by selection of lane 7. Depending on lane reversal, that selection is not a state change for some bricks. The way to force a state change in all cases is to switch to the grid clock, and then back to a lane. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* npu2: hw-procedures: Manipulate IOVALID during trainingReza Arbab2017-11-281-0/+24
| | | | | | | | | | | | | Ensure that the IOVALID bit for this brick is raised at the start of link training, in the reset_ntl procedure. Then, to protect us from a glitch when the PHY clock turns off or gets chopped, lower IOVALID for the duration of the phy_reset and phy_rx_dccal procedures. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* npu2: hw-procedures: Add obus_brick_index()Reza Arbab2017-11-281-16/+13
| | | | | | | | | | | | We have code in reset_ntl() which finds the index number of our brick within its obus chiplet. Move that logic to a separate function for reuse. No functional change. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/bitmap: Test bitmap foreach functionsStewart Smith2017-11-281-0/+11
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/bitmap: fix bitmap iteration limit corruptionNicholas Piggin2017-11-271-2/+2
| | | | | | | | | | | | | | The bitmap iterators did not reduce the number of bits to scan when searching for the next bit, which would result in them overruning their bitmap. These are only used in one place, in xive reset, and the effect is that the xive reset code will keep zeroing memory until it reaches a block of memory of MAX_EQ_COUNT >> 3 bits in length, all zeroes. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* travis: Add Fedora 27Stewart Smith2017-11-222-0/+8
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* skiboot 5.9.3 release notesStewart Smith2017-11-221-0/+24
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> (cherry picked from commit cd8ff4d49427ae84b6c241df30a0831b6022d1a8) Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* npu2: hw-procedures: Add check_credits procedureReza Arbab2017-11-212-1/+39
| | | | | | | | | | | | | | As an immediate mitigator for a current hardware glitch, add a procedure that can be used to validate NTL credit values. This will be called as a safeguard to check that link training succeeded. Assert that things are exactly as we expect, because if they aren't, the system will experience a catastrophic failure shortly after the start of link traffic. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* npu2: Print bdfn in NPU2DEV* logging macrosReza Arbab2017-11-211-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Revise the NPU2DEV{DBG,INF,ERR} logging macros to include the device's bdfn. It's useful to know exactly which link we're referring to. For instance, instead of [ 234.044921238,6] NPU6: Starting procedure reset_ntl [ 234.048578101,6] NPU6: Starting procedure reset_ntl [ 234.051049676,6] NPU6: Starting procedure reset_ntl [ 234.053503542,6] NPU6: Starting procedure reset_ntl [ 234.057182864,6] NPU6: Starting procedure reset_ntl [ 234.059666137,6] NPU6: Starting procedure reset_ntl we'll get [ 234.044921238,6] NPU6:0:0.0 Starting procedure reset_ntl [ 234.048578101,6] NPU6:0:0.1 Starting procedure reset_ntl [ 234.051049676,6] NPU6:0:0.2 Starting procedure reset_ntl [ 234.053503542,6] NPU6:0:1.0 Starting procedure reset_ntl [ 234.057182864,6] NPU6:0:1.1 Starting procedure reset_ntl [ 234.059666137,6] NPU6:0:1.2 Starting procedure reset_ntl Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Acked-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Shared slot state synchronisation for hot resetRussell Currey2017-11-211-0/+14
| | | | | | | | | | When a device is shared between two PHBs, it doesn't get reset properly unless both PHBs issue a hot reset at "the same time". Practically this means a hot reset needs to be issued on both sides, and neither should bring the link up until the reset on both has completed. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Track peers of slotsRussell Currey2017-11-213-1/+6
| | | | | | | | | Witherspoon introduced a new concept where one physical slot is shared between two PHBs. Making a slot aware of its peer enables syncing between them where necessary. Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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