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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2018-10-16 13:15:06 +0530 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-10-23 20:08:21 -0500 |
| commit | 6ed87dbdd66b1451635bd0f0c4deb0fa8f07c78a (patch) | |
| tree | fb244a87e88f74a024af534888c84f876475a384 /libpore/p9_hcd_memmap_base.H | |
| parent | 9000b6b187f93cfdc3a9b1c0a158afb123d80bda (diff) | |
| download | talos-skiboot-6ed87dbdd66b1451635bd0f0c4deb0fa8f07c78a.tar.gz talos-skiboot-6ed87dbdd66b1451635bd0f0c4deb0fa8f07c78a.zip | |
STOP API: Changes for SMF and SPR self save
Commit accomplishes following:
- Implementation of new self restore region memory layout
- Restore of SPRs pertaining to SMF
- Self save of SPRs
- Backward compatibility with old self restore layout
Key_Cronus_Test=PM_REGRESS
Change-Id: I11359e392102d32896251225907eb95a43ba6f78
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66212
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66216
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'libpore/p9_hcd_memmap_base.H')
| -rw-r--r-- | libpore/p9_hcd_memmap_base.H | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/libpore/p9_hcd_memmap_base.H b/libpore/p9_hcd_memmap_base.H index e579eea9..000fafef 100644 --- a/libpore/p9_hcd_memmap_base.H +++ b/libpore/p9_hcd_memmap_base.H @@ -56,7 +56,7 @@ HCD_CONST64(PPMR_MAGIC_NUMBER, ULL(0x50504d525f312e30)) // PPM HCD_CONST64(PGPE_MAGIC_NUMBER, ULL(0x504750455F312E30)) // PGPE_1.0 HCD_CONST(CME_BUILD_VERSION, 0x001) // CME__1.0 -HCD_CONST(SGPE_BUILD_VERSION, 0x002) // SGPE_1.0 +HCD_CONST(SGPE_BUILD_VERSION, 0x003) // SGPE_3.0 HCD_CONST(PGPE_BUILD_VERSION, 0x001) // PGPE_1.0 HCD_CONST64(CPMR_MAGIC_NUMBER_BASE, ULL(0x43504d525f302e30)) // CPMR_0.0 @@ -278,8 +278,7 @@ HCD_CONST(MAX_L3_SCOM_ENTRIES, 16) // Reserve 06 HCD_CONST(MAX_EQ_SCOM_ENTRIES, 31) -HCD_CONST(QUAD_SCOM_RESTORE_REGS_PER_QUAD, - (MAX_EQ_SCOM_ENTRIES + MAX_L2_SCOM_ENTRIES + MAX_L3_SCOM_ENTRIES + 1)) +HCD_CONST(QUAD_SCOM_RESTORE_REGS_PER_QUAD, 256) HCD_CONST(QUAD_SCOM_RESTORE_SIZE_PER_QUAD, (SCOM_RESTORE_ENTRY_SIZE* QUAD_SCOM_RESTORE_REGS_PER_QUAD)) @@ -298,6 +297,9 @@ HCD_CONST(CPMR_ATTN_WORD1_BYTE, 0x04) HCD_CONST(CPMR_MAGIC_NUMBER_BYTE, 0x08) HCD_CONST(CPMR_BUILD_DATE_BYTE, 0x10) HCD_CONST(CPMR_BUILD_VER_BYTE, 0x14) +HCD_CONST(CPMR_SELF_RESTORE_VER_BYTE, 0x1C) +HCD_CONST(CPMR_STOP_API_VER_BYTE, 0x1D) +HCD_CONST(CPMR_URMOR_FIX_BYTE, 0x1E) HCD_CONST(CPMR_CME_HCODE_OFFSET_BYTE, 0x20) HCD_CONST(CPMR_CME_HCODE_LENGTH_BYTE, 0x24) HCD_CONST(CPMR_CORE_COMMON_RING_OFFSET_BYTE, 0x28) @@ -312,7 +314,7 @@ HCD_CONST(CPMR_SELF_RESTORE_OFFSET_BYTE, 0x48) HCD_CONST(CPMR_SELF_RESTORE_LENGTH_BYTE, 0x4C) HCD_CONST(CPMR_MAX_SCOM_REST_PER_CORE_BYTE, 0x50) -/// Self Restore +/// Self Restore without SMF Support HCD_CONST(SELF_RESTORE_CPMR_OFFSET, CPMR_HEADER_SIZE) HCD_CONST(SELF_RESTORE_INT_SIZE, (8 * ONE_KB)) @@ -331,7 +333,25 @@ HCD_CONST(SELF_RESTORE_CORE_REGS_SIZE, HCD_CONST(SELF_RESTORE_SIZE_TOTAL, (SELF_RESTORE_CODE_SIZE + SELF_RESTORE_CORE_REGS_SIZE)) - +// Self Restore Region With SMF Support +HCD_CONST(SMF_THREAD_LAUNCHER_SIZE, 1024) +HCD_CONST(SMF_SELF_RESTORE_CODE_SIZE, + (SELF_RESTORE_INT_SIZE + SMF_THREAD_LAUNCHER_SIZE)) + +HCD_CONST(SMF_CORE_RESTORE_THREAD_AREA_SIZE, HALF_KB) +HCD_CONST(SMF_SELF_SAVE_THREAD_AREA_SIZE, 256) +HCD_CONST(SMF_CORE_RESTORE_CORE_AREA_SIZE, HALF_KB) +HCD_CONST(SMF_CORE_SAVE_CORE_AREA_SIZE, HALF_KB) + +HCD_CONST(SMF_SELF_RESTORE_CORE_REGS_SIZE, + MAX_CORES_PER_CHIP * ((SMF_CORE_RESTORE_THREAD_AREA_SIZE* MAX_THREADS_PER_CORE ) + + (SMF_SELF_SAVE_THREAD_AREA_SIZE* MAX_THREADS_PER_CORE ) + + SMF_CORE_RESTORE_CORE_AREA_SIZE + + SMF_CORE_SAVE_CORE_AREA_SIZE )) + +HCD_CONST(SMF_SELF_RESTORE_SIZE_TOTAL, + (SMF_SELF_RESTORE_CODE_SIZE + SMF_SELF_RESTORE_CORE_REGS_SIZE)) +HCD_CONST( EC_LEVEL_URMOR_FIX, 0x23 ) /// Core Scom HCD_CONST(CORE_SCOM_RESTORE_CPMR_OFFSET, (256 * ONE_KB)) |
