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| author | Timothy Pearson <tpearson@raptorengineering.com> | 2018-12-12 22:26:13 -0600 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-26 16:01:06 +1100 |
| commit | 8b26e29acbc84e8bd5e18af194efd693b8b70912 (patch) | |
| tree | 045304ed5bbd6367ae6ab42d104ce812f65f471b /include | |
| parent | c86fb12c07a6dc7d878503c1d8ff2de705bf61d7 (diff) | |
| download | talos-skiboot-8b26e29acbc84e8bd5e18af194efd693b8b70912.tar.gz talos-skiboot-8b26e29acbc84e8bd5e18af194efd693b8b70912.zip | |
Retry link training at PCIe GEN1 if presence detected but training repeatedly failed
Certain older PCIe 1.0 devices will not train unless the training process starts at GEN1 speeds.
As a last resort when a device will not train, fall back to GEN1 speed for the last training attempt.
This is verified to fix devices based on the Conexant CX23888 on the Talos II platform.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
[stewart: cut P9NDD1.0 support, fixup dt_max_link_speed]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/phb4.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/phb4.h b/include/phb4.h index b6937664..adf45809 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -154,7 +154,7 @@ struct phb4_err { uint32_t err_bit; }; -#define PHB4_LINK_LINK_RETRIES 3 +#define PHB4_LINK_LINK_RETRIES 4 /* Link timeouts, increments of 10ms */ #define PHB4_LINK_ELECTRICAL_RETRIES 100 #define PHB4_LINK_WAIT_RETRIES 200 @@ -210,6 +210,7 @@ struct phb4 { const __be64 *lane_eq; bool lane_eq_en; unsigned int max_link_speed; + unsigned int dt_max_link_speed; uint64_t mrt_size; uint64_t mbt_size; |
