diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2019-01-08 00:04:26 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-13 14:36:44 +1100 |
| commit | 8a43bf86b7d4346521bd4ebc15eb3809d3d27adb (patch) | |
| tree | d17ac162d4037ecff73d27477ffc61945a37ac4e /include | |
| parent | 4ebb78cffda897c4175f6659e98e6722ea60703f (diff) | |
| download | talos-skiboot-8a43bf86b7d4346521bd4ebc15eb3809d3d27adb.tar.gz talos-skiboot-8a43bf86b7d4346521bd4ebc15eb3809d3d27adb.zip | |
core/exceptions: implement an exception handler for non-powersave sresets
Detect non-powersave sresets and send them to the normal exception
handler which prints registers and stack.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/processor.h | 4 | ||||
| -rw-r--r-- | include/skiboot.h | 5 |
2 files changed, 9 insertions, 0 deletions
diff --git a/include/processor.h b/include/processor.h index f6b227d3..0a934300 100644 --- a/include/processor.h +++ b/include/processor.h @@ -88,6 +88,10 @@ #define SPR_HID5 0x3f6 #define SPR_PIR 0x3ff /* RO: Processor Identification */ +/* Bits in SRR1 */ + +#define SPR_SRR1_PM_WAKE_MASK 0x3c0000 /* PM wake reason for P8/9 */ +#define SPR_SRR1_PM_WAKE_SRESET 0x100000 /* Bits in LPCR */ diff --git a/include/skiboot.h b/include/skiboot.h index 96caa271..0f6a8552 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -285,6 +285,11 @@ extern void fast_sleep_exit(void); /* Fallback fake RTC */ extern void fake_rtc_init(void); +/* Exceptions */ +struct stack_frame; +extern void __noreturn exception_entry(struct stack_frame *stack); +extern void __noreturn exception_entry_pm_sreset(void); + /* Assembly in head.S */ extern void disable_machine_check(void); extern void enable_machine_check(void); |
