diff options
| author | Joel Stanley <joel@jms.id.au> | 2015-11-25 16:12:38 +1030 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-11-26 15:16:37 +1100 |
| commit | e25f3f3559d91ad2335d8f67888a1813945318a6 (patch) | |
| tree | 0ce927fd66ac797d3a507e77ee4ca87be2c45b2c /hw | |
| parent | 7bcbbd2c3c3b01bb0b42c32145e4a0ad0952a9be (diff) | |
| download | talos-skiboot-e25f3f3559d91ad2335d8f67888a1813945318a6.tar.gz talos-skiboot-e25f3f3559d91ad2335d8f67888a1813945318a6.zip | |
libflash: enable 4b mode on BMC SPI flash
We already support larger parts on the host flash, but the BMC
has always had a 16MB part, so we did not need to enable the 4b
addressing mode.
This enables the 4b addressing mode when the flash is larger than 16MB.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ast-bmc/ast-sf-ctrl.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/hw/ast-bmc/ast-sf-ctrl.c b/hw/ast-bmc/ast-sf-ctrl.c index 0ca32da0..d18031a7 100644 --- a/hw/ast-bmc/ast-sf-ctrl.c +++ b/hw/ast-bmc/ast-sf-ctrl.c @@ -152,8 +152,11 @@ static int ast_sf_cmd_wr(struct spi_flash_ctrl *ctrl, uint8_t cmd, static int ast_sf_set_4b(struct spi_flash_ctrl *ctrl, bool enable) { struct ast_sf_ctrl *ct = container_of(ctrl, struct ast_sf_ctrl, ops); + uint32_t ce_ctrl = 0; - if (ct->type != AST_SF_TYPE_PNOR) + if (ct->type == AST_SF_TYPE_BMC && ct->ops.finfo->size > 0x1000000) + ce_ctrl = ast_ahb_readl(BMC_SPI_FCTL_CE_CTRL); + else if (ct->type != AST_SF_TYPE_PNOR) return enable ? FLASH_ERR_4B_NOT_SUPPORTED : 0; /* @@ -164,15 +167,20 @@ static int ast_sf_set_4b(struct spi_flash_ctrl *ctrl, bool enable) if (enable) { ct->ctl_val |= 0x2000; ct->ctl_read_val |= 0x2000; + ce_ctrl |= 0x1; } else { ct->ctl_val &= ~0x2000; ct->ctl_read_val &= ~0x2000; + ce_ctrl &= ~0x1; } ct->mode_4b = enable; /* Update read mode */ ast_ahb_writel(ct->ctl_read_val, ct->ctl_reg); + if (ce_ctrl) + ast_ahb_writel(ce_ctrl, BMC_SPI_FCTL_CE_CTRL); + return 0; } |
