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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-09-10 14:35:52 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-10-07 18:42:02 +1100 |
| commit | 72f0f43d60718ff4de7430b425b430343223cbac (patch) | |
| tree | 755a8abf2f14677ffe7e3e68eece92fba46f0b39 /hw | |
| parent | 516424269edde1a53d40a34ecc540503b6e0b38b (diff) | |
| download | talos-skiboot-72f0f43d60718ff4de7430b425b430343223cbac.tar.gz talos-skiboot-72f0f43d60718ff4de7430b425b430343223cbac.zip | |
pci: Use a fixed numbering of PHBs on OPAL and improve log consistency
On P8, we calculate the OPAL ID of the PHB as a function of the physical
chip number and PHB index on that chip. P7 continues using "allocated"
numbers for now.
We also consistently print the PHB ID as a 4-digit hex number which
facilitates decoding it, and print the chip:index location in the probe
code to make it easier to correlate log entries.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: use next_chip rather than get_chip]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/p5ioc2-phb.c | 6 | ||||
| -rw-r--r-- | hw/p7ioc-phb.c | 6 | ||||
| -rw-r--r-- | hw/phb3.c | 21 |
3 files changed, 21 insertions, 12 deletions
diff --git a/hw/p5ioc2-phb.c b/hw/p5ioc2-phb.c index 06c2cc29..1c9dbb6a 100644 --- a/hw/p5ioc2-phb.c +++ b/hw/p5ioc2-phb.c @@ -25,9 +25,9 @@ #include <interrupts.h> #include <ccan/str/str.h> -#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB%d: " fmt, \ +#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) -#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB%d: " fmt, \ +#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) /* @@ -1197,7 +1197,7 @@ void p5ioc2_phb_setup(struct p5ioc2 *ioc, struct p5ioc2_phb *p, /* We register the PHB before we initialize it so we * get a useful OPAL ID for it */ - pci_register_phb(&p->phb); + pci_register_phb(&p->phb, -1); /* Platform additional setup */ if (platform.pci_setup_phb) diff --git a/hw/p7ioc-phb.c b/hw/p7ioc-phb.c index 51678326..4ea0369c 100644 --- a/hw/p7ioc-phb.c +++ b/hw/p7ioc-phb.c @@ -26,9 +26,9 @@ #include <opal.h> #include <ccan/str/str.h> -#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB%d: " fmt, \ +#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) -#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB%d: " fmt, \ +#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) /* Helper to select an IODA table entry */ @@ -2929,7 +2929,7 @@ void p7ioc_phb_setup(struct p7ioc *ioc, uint8_t index) /* We register the PHB before we initialize it so we * get a useful OPAL ID for it */ - pci_register_phb(&p->phb); + pci_register_phb(&p->phb, -1); /* Platform additional setup */ if (platform.pci_setup_phb) @@ -53,11 +53,11 @@ static void phb3_init_hw(struct phb3 *p, bool first_init); -#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB%d: " fmt, \ +#define PHBDBG(p, fmt, a...) prlog(PR_DEBUG, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) -#define PHBINF(p, fmt, a...) prlog(PR_INFO, "PHB%d: " fmt, \ +#define PHBINF(p, fmt, a...) prlog(PR_INFO, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) -#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB%d: " fmt, \ +#define PHBERR(p, fmt, a...) prlog(PR_ERR, "PHB#%04x: " fmt, \ (p)->phb.opal_id, ## a) /* @@ -4235,6 +4235,8 @@ static void phb3_create(struct dt_node *np) struct phb3 *p = zalloc(sizeof(struct phb3)); size_t lane_eq_len; struct dt_node *iplp; + struct proc_chip *chip; + int opal_id; char *path; assert(p); @@ -4286,13 +4288,20 @@ static void phb3_create(struct dt_node *np) p->has_link = false; /* We register the PHB before we initialize it so we - * get a useful OPAL ID for it + * get a useful OPAL ID for it. We use a different numbering here + * between Naples and Venice/Murano in order to leave room for the + * NPU on Naples. */ - pci_register_phb(&p->phb); + chip = next_chip(NULL); /* Just need any chip */ + if (chip && chip->type == PROC_CHIP_P8_NAPLES) + opal_id = p->chip_id * 8 + p->index; + else + opal_id = p->chip_id * 4 + p->index; + pci_register_phb(&p->phb, opal_id); /* Hello ! */ path = dt_get_path(np); - PHBINF(p, "Found %s @%p\n", path, p->regs); + PHBINF(p, "Found %s @[%d:%d]\n", path, p->chip_id, p->index); PHBINF(p, " M32 [0x%016llx..0x%016llx]\n", p->mm1_base, p->mm1_base + p->mm1_size - 1); PHBINF(p, " M64 [0x%016llx..0x%016llx]\n", |
